diff --git a/qla2x00t/qla_attr.c b/qla2x00t/qla_attr.c
index b6f37980e..e7cc73cc1 100644
--- a/qla2x00t/qla_attr.c
+++ b/qla2x00t/qla_attr.c
@@ -1179,7 +1179,7 @@ do_read:
 		count = 0;
 	}
 
-	count = actual_size > count ? count: actual_size;
+	count = actual_size > count ? count : actual_size;
 	memcpy(buf, ha->xgmac_data, count);
 
 	return count;
diff --git a/qla2x00t/qla_def.h b/qla2x00t/qla_def.h
index 2bb941796..31d4e79ca 100644
--- a/qla2x00t/qla_def.h
+++ b/qla2x00t/qla_def.h
@@ -137,7 +137,7 @@
  * 133Mhz slot.
  */
 #define RD_REG_WORD_PIO(addr)		(inw((unsigned long)addr))
-#define WRT_REG_WORD_PIO(addr, data)	(outw(data,(unsigned long)addr))
+#define WRT_REG_WORD_PIO(addr, data)	(outw(data, (unsigned long)addr))
 
 /*
  * Fibre Channel device definitions.
@@ -2729,7 +2729,7 @@ struct qla_hw_data {
 
 	/* NVRAM configuration data */
 #define MAX_NVRAM_SIZE  4096
-#define VPD_OFFSET      MAX_NVRAM_SIZE / 2
+#define VPD_OFFSET      (MAX_NVRAM_SIZE / 2)
 	uint16_t	nvram_size;
 	uint16_t	nvram_base;
 	void		*nvram;
diff --git a/qla2x00t/qla_mbx.c b/qla2x00t/qla_mbx.c
index f0dd3d509..104ed82f3 100644
--- a/qla2x00t/qla_mbx.c
+++ b/qla2x00t/qla_mbx.c
@@ -4785,7 +4785,7 @@ qla82xx_md_get_template_size(scsi_qla_host_t *vha)
 	mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
 
 	mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
-	mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8| \
+	mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
 	    MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
 
 	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
@@ -4844,7 +4844,7 @@ qla82xx_md_get_template(scsi_qla_host_t *vha)
 
 	mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
 	mcp->tov = MBX_TOV_SECONDS;
-	mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8| \
+	mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
 	    MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
 	mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
 	rval = qla2x00_mailbox_command(vha, mcp);
diff --git a/qla2x00t/qla_nx.c b/qla2x00t/qla_nx.c
index c459ba629..5b5a0fb27 100644
--- a/qla2x00t/qla_nx.c
+++ b/qla2x00t/qla_nx.c
@@ -1977,7 +1977,7 @@ qla82xx_check_rcvpeg_state(struct qla_hw_data *ha)
 }
 
 /* ISR related functions */
-static struct qla82xx_legacy_intr_set legacy_intr[] = \
+static struct qla82xx_legacy_intr_set legacy_intr[] =
 	QLA82XX_LEGACY_INTR_CONFIG;
 
 /*
@@ -3268,7 +3268,7 @@ qla82xx_device_state_handler(scsi_qla_host_t *vha)
 		case QLA82XX_DEV_NEED_QUIESCENT:
 			qla82xx_need_qsnt_handler(vha);
 			/* Reset timeout value after quiescence handler */
-			dev_init_timeout = jiffies + (ha->nx_dev_init_timeout\
+			dev_init_timeout = jiffies + (ha->nx_dev_init_timeout
 							* HZ);
 			break;
 		case QLA82XX_DEV_QUIESCENT:
@@ -3283,7 +3283,7 @@ qla82xx_device_state_handler(scsi_qla_host_t *vha)
 			qla82xx_idc_lock(ha);
 
 			/* Reset timeout value after quiescence handler */
-			dev_init_timeout = jiffies + (ha->nx_dev_init_timeout\
+			dev_init_timeout = jiffies + (ha->nx_dev_init_timeout
 							* HZ);
 			break;
 		case QLA82XX_DEV_FAILED:
@@ -4168,7 +4168,7 @@ qla82xx_md_collect(scsi_qla_host_t *vha)
 		goto md_failed;
 	}
 
-	entry_hdr = (qla82xx_md_entry_hdr_t *) \
+	entry_hdr = (qla82xx_md_entry_hdr_t *)
 	    (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset);
 
 	/* Walk through the entry headers */
@@ -4275,7 +4275,7 @@ qla82xx_md_collect(scsi_qla_host_t *vha)
 		data_collected = (uint8_t *)data_ptr -
 		    (uint8_t *)ha->md_dump;
 skip_nxt_entry:
-		entry_hdr = (qla82xx_md_entry_hdr_t *) \
+		entry_hdr = (qla82xx_md_entry_hdr_t *)
 		    (((uint8_t *)entry_hdr) + entry_hdr->entry_size);
 	}
 
diff --git a/qla2x00t/qla_nx.h b/qla2x00t/qla_nx.h
index 30c4de772..f395d6cfb 100644
--- a/qla2x00t/qla_nx.h
+++ b/qla2x00t/qla_nx.h
@@ -487,13 +487,13 @@
 #define QLA82XX_ADDR_QDR_NET		(0x0000000300000000ULL)
 #define QLA82XX_P3_ADDR_QDR_NET_MAX	(0x0000000303ffffffULL)
 
-#define QLA82XX_PCI_CRBSPACE		(unsigned long)0x06000000
-#define QLA82XX_PCI_DIRECT_CRB		(unsigned long)0x04400000
-#define QLA82XX_PCI_CAMQM		(unsigned long)0x04800000
-#define QLA82XX_PCI_CAMQM_MAX		(unsigned long)0x04ffffff
-#define QLA82XX_PCI_DDR_NET		(unsigned long)0x00000000
-#define QLA82XX_PCI_QDR_NET		(unsigned long)0x04000000
-#define QLA82XX_PCI_QDR_NET_MAX		(unsigned long)0x043fffff
+#define QLA82XX_PCI_CRBSPACE		0x06000000UL
+#define QLA82XX_PCI_DIRECT_CRB		0x04400000UL
+#define QLA82XX_PCI_CAMQM		0x04800000UL
+#define QLA82XX_PCI_CAMQM_MAX		0x04ffffffUL
+#define QLA82XX_PCI_DDR_NET		0x00000000UL
+#define QLA82XX_PCI_QDR_NET		0x04000000UL
+#define QLA82XX_PCI_QDR_NET_MAX		0x043fffffUL
 
 /*
  *