chore(fpga): untrack TB-generated CSV, ignore a.out

rx_final_doppler_out.csv is written by tb_radar_receiver_final.v on
every run via $fopen — it is a test-run artifact, not an oracle. It
was mistakenly tracked in an earlier commit, causing unnecessary
churn on every sim. Remove from the index and ignore going forward.

Also ignore stray a.out from iverilog one-shot compiles.

Golden references (.hex, .mem, doppler_golden_py_*.csv) remain
tracked — they are load-bearing oracles used by MF / Doppler /
receiver cosim testbenches.

9_Firmware/9_2_FPGA/.gitignore

@@ -3,6 +3,13 @@
 *.vcd
 tb/*.vvp
 tb/*.vcd
+a.out
+
+# Test-run outputs (written by testbenches, not oracles/stimulus).
+# NOTE: golden references (.hex, .mem, doppler_golden_py_*.csv) ARE
+# committed — they are load-bearing oracles for MF/Doppler/receiver
+# cosim tests. Only TB-written CSV outputs are ignored here.
+tb/cosim/rx_final_doppler_out.csv
 
 # Vivado project files (managed separately)
 *.jou