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Crypto: no unaligned 64-bit accesses on 32-bit ARM (#1908)
CRYPTOPP_ALLOW_UNALIGNED_DATA_ACCESS was defined whenever __ARM_FEATURE_UNALIGNED is set, which includes 32-bit ARMv6/ARMv7. There the hardware handles unaligned single-word loads and stores, but not LDRD/STRD/LDM, which the compiler uses for 64-bit words. Camellia (camellia_load64/camellia_store64) and Whirlpool (HashMultipleBlocks on unaligned input) then access 64-bit words through unaligned pointers. camellia_set_key() raised SIGBUS in the XTS self-test on an ARMv7 (cortex-a15) build whose test key happened to be only 2-byte aligned. Define the macro for AArch64 only among the ARM targets; on 32-bit ARM the memcpy and aligned-copy paths are used instead. Signed-off-by: Ville Takio <ville+git@takio.fi>
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@@ -263,7 +263,10 @@
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#endif
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#if !defined(CRYPTOPP_NO_UNALIGNED_DATA_ACCESS) && !defined(CRYPTOPP_ALLOW_UNALIGNED_DATA_ACCESS)
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#if (CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || defined(__powerpc__) || (__ARM_FEATURE_UNALIGNED >= 1))
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// Users of this macro (Camellia, Whirlpool) load and store 64-bit words through
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// unaligned pointers. 32-bit ARM supports unaligned single-word accesses only:
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// the LDRD/STRD/LDM instructions used for 64-bit words still fault (SIGBUS).
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#if (CRYPTOPP_BOOL_X64 || CRYPTOPP_BOOL_X86 || CRYPTOPP_BOOL_X32 || defined(__powerpc__) || (defined(__aarch64__) && __ARM_FEATURE_UNALIGNED >= 1))
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#define CRYPTOPP_ALLOW_UNALIGNED_DATA_ACCESS
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#endif
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#endif
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