mirror of
https://github.com/SCST-project/scst.git
synced 2026-07-26 10:02:41 +00:00
Merge branch 'svn-trunk'
This commit is contained in:
@@ -674,6 +674,7 @@ qla2x00_sysfs_write_reset(struct file *filp, struct kobject *kobj,
|
||||
int type;
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||||
uint32_t idc_control;
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uint8_t *tmp_data = NULL;
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||||
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if (off != 0)
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return -EINVAL;
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@@ -887,7 +888,7 @@ do_read:
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count = 0;
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}
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count = actual_size > count ? count: actual_size;
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count = actual_size > count ? count : actual_size;
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memcpy(buf, ha->xgmac_data, count);
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return count;
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@@ -1079,6 +1080,7 @@ qla2x00_isp_name_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
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return scnprintf(buf, PAGE_SIZE, "ISP%04X\n", vha->hw->pdev->device);
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}
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@@ -1112,6 +1114,7 @@ qla2x00_model_desc_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
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return scnprintf(buf, PAGE_SIZE, "%s\n", vha->hw->model_desc);
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}
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@@ -1324,6 +1327,7 @@ qla2x00_optrom_bios_version_show(struct device *dev,
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{
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scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
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struct qla_hw_data *ha = vha->hw;
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return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->bios_revision[1],
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ha->bios_revision[0]);
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}
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@@ -1334,6 +1338,7 @@ qla2x00_optrom_efi_version_show(struct device *dev,
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{
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scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
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struct qla_hw_data *ha = vha->hw;
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return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->efi_revision[1],
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ha->efi_revision[0]);
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}
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@@ -1344,6 +1349,7 @@ qla2x00_optrom_fcode_version_show(struct device *dev,
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{
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scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
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struct qla_hw_data *ha = vha->hw;
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return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->fcode_revision[1],
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ha->fcode_revision[0]);
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}
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@@ -1354,6 +1360,7 @@ qla2x00_optrom_fw_version_show(struct device *dev,
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{
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scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
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struct qla_hw_data *ha = vha->hw;
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return scnprintf(buf, PAGE_SIZE, "%d.%02d.%02d %d\n",
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ha->fw_revision[0], ha->fw_revision[1], ha->fw_revision[2],
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ha->fw_revision[3]);
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@@ -1380,6 +1387,7 @@ qla2x00_total_isp_aborts_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
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return scnprintf(buf, PAGE_SIZE, "%d\n",
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vha->qla_stats.total_isp_aborts);
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}
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@@ -2803,8 +2811,8 @@ qla24xx_vport_create(struct fc_vport *fc_vport, bool disable)
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/* initialized vport states */
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atomic_set(&vha->loop_state, LOOP_DOWN);
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vha->vp_err_state= VP_ERR_PORTDWN;
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vha->vp_prev_err_state= VP_ERR_UNKWN;
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vha->vp_err_state = VP_ERR_PORTDWN;
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vha->vp_prev_err_state = VP_ERR_UNKWN;
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/* Check if physical ha port is Up */
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if (atomic_read(&base_vha->loop_state) == LOOP_DOWN ||
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atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
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@@ -2819,6 +2827,7 @@ qla24xx_vport_create(struct fc_vport *fc_vport, bool disable)
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if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
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if (ha->fw_attributes & BIT_4) {
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int prot = 0, guard;
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vha->flags.difdix_supported = 1;
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ql_dbg(ql_dbg_user, vha, 0x7082,
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"Registered for DIF/DIX type 1 and 3 protection.\n");
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@@ -1103,9 +1103,8 @@ static int qla84xx_updatefw(struct bsg_job *bsg_job)
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mn->fw_ver = cpu_to_le32(fw_ver);
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mn->fw_size = cpu_to_le32(data_len);
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mn->fw_seq_size = cpu_to_le32(data_len);
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mn->dseg_address[0] = cpu_to_le32(LSD(fw_dma));
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mn->dseg_address[1] = cpu_to_le32(MSD(fw_dma));
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mn->dseg_length = cpu_to_le32(data_len);
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put_unaligned_le64(fw_dma, &mn->dsd.address);
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mn->dsd.length = cpu_to_le32(data_len);
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mn->data_seg_cnt = cpu_to_le16(1);
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rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
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@@ -1287,9 +1286,8 @@ static int qla84xx_mgmt_cmd(struct bsg_job *bsg_job)
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if (ql84_mgmt->mgmt.cmd != QLA84_MGMT_CHNG_CONFIG) {
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mn->total_byte_cnt = cpu_to_le32(ql84_mgmt->mgmt.len);
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mn->dseg_count = cpu_to_le16(1);
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mn->dseg_address[0] = cpu_to_le32(LSD(mgmt_dma));
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mn->dseg_address[1] = cpu_to_le32(MSD(mgmt_dma));
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mn->dseg_length = cpu_to_le32(ql84_mgmt->mgmt.len);
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put_unaligned_le64(mgmt_dma, &mn->dsd.address);
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mn->dsd.length = cpu_to_le32(ql84_mgmt->mgmt.len);
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}
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rval = qla2x00_issue_iocb(vha, mn, mn_dma, 0);
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@@ -445,7 +445,7 @@ qla2xxx_dump_ram(struct qla_hw_data *ha, uint32_t addr, uint16_t *ram,
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}
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}
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*nxt = rval == QLA_SUCCESS ? &ram[cnt]: NULL;
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*nxt = rval == QLA_SUCCESS ? &ram[cnt] : NULL;
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return rval;
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}
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||||
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+17
-55
@@ -49,6 +49,7 @@
|
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#endif
|
||||
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#include "qla_bsg.h"
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#include "qla_dsd.h"
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#include "qla_nx.h"
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#include "qla_nx2.h"
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#include "qla_nvme.h"
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@@ -1346,8 +1347,8 @@ typedef struct {
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||||
uint16_t response_q_inpointer;
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uint16_t request_q_length;
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uint16_t response_q_length;
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uint32_t request_q_address[2];
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uint32_t response_q_address[2];
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__le64 request_q_address __packed;
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||||
__le64 response_q_address __packed;
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uint16_t lun_enables;
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uint8_t command_resource_count;
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@@ -1772,12 +1773,10 @@ typedef struct {
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||||
uint16_t dseg_count; /* Data segment count. */
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||||
uint8_t scsi_cdb[MAX_CMDSZ]; /* SCSI command words. */
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||||
uint32_t byte_count; /* Total byte count. */
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uint32_t dseg_0_address; /* Data segment 0 address. */
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uint32_t dseg_0_length; /* Data segment 0 length. */
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uint32_t dseg_1_address; /* Data segment 1 address. */
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uint32_t dseg_1_length; /* Data segment 1 length. */
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uint32_t dseg_2_address; /* Data segment 2 address. */
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uint32_t dseg_2_length; /* Data segment 2 length. */
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union {
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struct dsd32 dsd32[3];
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||||
struct dsd64 dsd64[2];
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};
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} cmd_entry_t;
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||||
/*
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@@ -1798,10 +1797,7 @@ typedef struct {
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uint16_t dseg_count; /* Data segment count. */
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uint8_t scsi_cdb[MAX_CMDSZ]; /* SCSI command words. */
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uint32_t byte_count; /* Total byte count. */
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uint32_t dseg_0_address[2]; /* Data segment 0 address. */
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uint32_t dseg_0_length; /* Data segment 0 length. */
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uint32_t dseg_1_address[2]; /* Data segment 1 address. */
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uint32_t dseg_1_length; /* Data segment 1 length. */
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struct dsd64 dsd[2];
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} cmd_a64_entry_t, request_t;
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/*
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@@ -1814,20 +1810,7 @@ typedef struct {
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uint8_t sys_define; /* System defined. */
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uint8_t entry_status; /* Entry Status. */
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uint32_t reserved;
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uint32_t dseg_0_address; /* Data segment 0 address. */
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uint32_t dseg_0_length; /* Data segment 0 length. */
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uint32_t dseg_1_address; /* Data segment 1 address. */
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uint32_t dseg_1_length; /* Data segment 1 length. */
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uint32_t dseg_2_address; /* Data segment 2 address. */
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uint32_t dseg_2_length; /* Data segment 2 length. */
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uint32_t dseg_3_address; /* Data segment 3 address. */
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uint32_t dseg_3_length; /* Data segment 3 length. */
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uint32_t dseg_4_address; /* Data segment 4 address. */
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uint32_t dseg_4_length; /* Data segment 4 length. */
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uint32_t dseg_5_address; /* Data segment 5 address. */
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uint32_t dseg_5_length; /* Data segment 5 length. */
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uint32_t dseg_6_address; /* Data segment 6 address. */
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uint32_t dseg_6_length; /* Data segment 6 length. */
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struct dsd32 dsd[7];
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} cont_entry_t;
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/*
|
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@@ -1839,16 +1822,7 @@ typedef struct {
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uint8_t entry_count; /* Entry count. */
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uint8_t sys_define; /* System defined. */
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uint8_t entry_status; /* Entry Status. */
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uint32_t dseg_0_address[2]; /* Data segment 0 address. */
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uint32_t dseg_0_length; /* Data segment 0 length. */
|
||||
uint32_t dseg_1_address[2]; /* Data segment 1 address. */
|
||||
uint32_t dseg_1_length; /* Data segment 1 length. */
|
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uint32_t dseg_2_address [2]; /* Data segment 2 address. */
|
||||
uint32_t dseg_2_length; /* Data segment 2 length. */
|
||||
uint32_t dseg_3_address[2]; /* Data segment 3 address. */
|
||||
uint32_t dseg_3_length; /* Data segment 3 length. */
|
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uint32_t dseg_4_address[2]; /* Data segment 4 address. */
|
||||
uint32_t dseg_4_length; /* Data segment 4 length. */
|
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struct dsd64 dsd[5];
|
||||
} cont_a64_entry_t;
|
||||
|
||||
#define PO_MODE_DIF_INSERT 0
|
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@@ -1892,8 +1866,7 @@ struct crc_context {
|
||||
uint16_t reserved_2;
|
||||
uint16_t reserved_3;
|
||||
uint32_t reserved_4;
|
||||
uint32_t data_address[2];
|
||||
uint32_t data_length;
|
||||
struct dsd64 data_dsd;
|
||||
uint32_t reserved_5[2];
|
||||
uint32_t reserved_6;
|
||||
} nobundling;
|
||||
@@ -1903,11 +1876,8 @@ struct crc_context {
|
||||
uint16_t reserved_1;
|
||||
__le16 dseg_count; /* Data segment count */
|
||||
uint32_t reserved_2;
|
||||
uint32_t data_address[2];
|
||||
uint32_t data_length;
|
||||
uint32_t dif_address[2];
|
||||
uint32_t dif_length; /* Data segment 0
|
||||
* length */
|
||||
struct dsd64 data_dsd;
|
||||
struct dsd64 dif_dsd;
|
||||
} bundling;
|
||||
} u;
|
||||
|
||||
@@ -2106,10 +2076,8 @@ typedef struct {
|
||||
uint32_t handle2;
|
||||
uint32_t rsp_bytecount;
|
||||
uint32_t req_bytecount;
|
||||
uint32_t dseg_req_address[2]; /* Data segment 0 address. */
|
||||
uint32_t dseg_req_length; /* Data segment 0 length. */
|
||||
uint32_t dseg_rsp_address[2]; /* Data segment 1 address. */
|
||||
uint32_t dseg_rsp_length; /* Data segment 1 length. */
|
||||
struct dsd64 req_dsd;
|
||||
struct dsd64 rsp_dsd;
|
||||
} ms_iocb_entry_t;
|
||||
|
||||
|
||||
@@ -2487,13 +2455,7 @@ struct event_arg {
|
||||
#define FCS_DEVICE_LOST 3
|
||||
#define FCS_ONLINE 4
|
||||
|
||||
static const char * const port_state_str[] = {
|
||||
"Unknown",
|
||||
"UNCONFIGURED",
|
||||
"DEAD",
|
||||
"LOST",
|
||||
"ONLINE"
|
||||
};
|
||||
extern const char *const port_state_str[5];
|
||||
|
||||
/*
|
||||
* FC port flags.
|
||||
@@ -3085,7 +3047,7 @@ struct sns_cmd_pkt {
|
||||
struct {
|
||||
uint16_t buffer_length;
|
||||
uint16_t reserved_1;
|
||||
uint32_t buffer_address[2];
|
||||
__le64 buffer_address __packed;
|
||||
uint16_t subcommand_length;
|
||||
uint16_t reserved_2;
|
||||
uint16_t subcommand;
|
||||
|
||||
@@ -0,0 +1,30 @@
|
||||
#ifndef _QLA_DSD_H_
|
||||
#define _QLA_DSD_H_
|
||||
|
||||
/* 32-bit data segment descriptor (8 bytes) */
|
||||
struct dsd32 {
|
||||
__le32 address;
|
||||
__le32 length;
|
||||
};
|
||||
|
||||
static inline void append_dsd32(struct dsd32 **dsd, struct scatterlist *sg)
|
||||
{
|
||||
put_unaligned_le32(sg_dma_address(sg), &(*dsd)->address);
|
||||
put_unaligned_le32(sg_dma_len(sg), &(*dsd)->length);
|
||||
(*dsd)++;
|
||||
}
|
||||
|
||||
/* 64-bit data segment descriptor (12 bytes) */
|
||||
struct dsd64 {
|
||||
__le64 address;
|
||||
__le32 length;
|
||||
} __packed;
|
||||
|
||||
static inline void append_dsd64(struct dsd64 **dsd, struct scatterlist *sg)
|
||||
{
|
||||
put_unaligned_le64(sg_dma_address(sg), &(*dsd)->address);
|
||||
put_unaligned_le32(sg_dma_len(sg), &(*dsd)->length);
|
||||
(*dsd)++;
|
||||
}
|
||||
|
||||
#endif
|
||||
+31
-36
@@ -21,6 +21,8 @@
|
||||
#include "backport.h"
|
||||
#endif
|
||||
|
||||
#include "qla_dsd.h"
|
||||
|
||||
#define MBS_CHECKSUM_ERROR 0x4010
|
||||
#define MBS_INVALID_PRODUCT_KEY 0x4020
|
||||
|
||||
@@ -350,9 +352,9 @@ struct init_cb_24xx {
|
||||
|
||||
uint16_t prio_request_q_length;
|
||||
|
||||
uint32_t request_q_address[2];
|
||||
uint32_t response_q_address[2];
|
||||
uint32_t prio_request_q_address[2];
|
||||
__le64 request_q_address __packed;
|
||||
__le64 response_q_address __packed;
|
||||
__le64 prio_request_q_address __packed;
|
||||
|
||||
uint16_t msix;
|
||||
uint16_t msix_atio;
|
||||
@@ -360,7 +362,7 @@ struct init_cb_24xx {
|
||||
|
||||
uint16_t atio_q_inpointer;
|
||||
uint16_t atio_q_length;
|
||||
uint32_t atio_q_address[2];
|
||||
__le64 atio_q_address __packed;
|
||||
|
||||
uint16_t interrupt_delay_timer; /* 100us increments. */
|
||||
uint16_t login_timeout;
|
||||
@@ -464,7 +466,7 @@ struct cmd_bidir {
|
||||
#define BD_WRITE_DATA BIT_0
|
||||
|
||||
uint16_t fcp_cmnd_dseg_len; /* Data segment length. */
|
||||
uint32_t fcp_cmnd_dseg_address[2]; /* Data segment address. */
|
||||
__le64 fcp_cmnd_dseg_address __packed;/* Data segment address. */
|
||||
|
||||
uint16_t reserved[2]; /* Reserved */
|
||||
|
||||
@@ -474,8 +476,7 @@ struct cmd_bidir {
|
||||
uint8_t port_id[3]; /* PortID of destination port.*/
|
||||
uint8_t vp_index;
|
||||
|
||||
uint32_t fcp_data_dseg_address[2]; /* Data segment address. */
|
||||
uint16_t fcp_data_dseg_len; /* Data segment length. */
|
||||
struct dsd64 fcp_dsd;
|
||||
};
|
||||
|
||||
#define COMMAND_TYPE_6 0x48 /* Command Type 6 entry */
|
||||
@@ -502,18 +503,18 @@ struct cmd_type_6 {
|
||||
#define CF_READ_DATA BIT_1
|
||||
#define CF_WRITE_DATA BIT_0
|
||||
|
||||
uint16_t fcp_cmnd_dseg_len; /* Data segment length. */
|
||||
uint32_t fcp_cmnd_dseg_address[2]; /* Data segment address. */
|
||||
|
||||
uint32_t fcp_rsp_dseg_address[2]; /* Data segment address. */
|
||||
uint16_t fcp_cmnd_dseg_len; /* Data segment length. */
|
||||
/* Data segment address. */
|
||||
__le64 fcp_cmnd_dseg_address __packed;
|
||||
/* Data segment address. */
|
||||
__le64 fcp_rsp_dseg_address __packed;
|
||||
|
||||
uint32_t byte_count; /* Total byte count. */
|
||||
|
||||
uint8_t port_id[3]; /* PortID of destination port. */
|
||||
uint8_t vp_index;
|
||||
|
||||
uint32_t fcp_data_dseg_address[2]; /* Data segment address. */
|
||||
uint32_t fcp_data_dseg_len; /* Data segment length. */
|
||||
struct dsd64 fcp_dsd;
|
||||
};
|
||||
|
||||
#define COMMAND_TYPE_7 0x18 /* Command Type 7 entry */
|
||||
@@ -559,8 +560,7 @@ struct cmd_type_7 {
|
||||
uint8_t port_id[3]; /* PortID of destination port. */
|
||||
uint8_t vp_index;
|
||||
|
||||
uint32_t dseg_0_address[2]; /* Data segment 0 address. */
|
||||
uint32_t dseg_0_len; /* Data segment 0 length. */
|
||||
struct dsd64 dsd;
|
||||
};
|
||||
|
||||
#define COMMAND_TYPE_CRC_2 0x6A /* Command Type CRC_2 (Type 6)
|
||||
@@ -584,17 +584,17 @@ struct cmd_type_crc_2 {
|
||||
|
||||
uint16_t control_flags; /* Control flags. */
|
||||
|
||||
uint16_t fcp_cmnd_dseg_len; /* Data segment length. */
|
||||
uint32_t fcp_cmnd_dseg_address[2]; /* Data segment address. */
|
||||
|
||||
uint32_t fcp_rsp_dseg_address[2]; /* Data segment address. */
|
||||
uint16_t fcp_cmnd_dseg_len; /* Data segment length. */
|
||||
__le64 fcp_cmnd_dseg_address __packed;
|
||||
/* Data segment address. */
|
||||
__le64 fcp_rsp_dseg_address __packed;
|
||||
|
||||
uint32_t byte_count; /* Total byte count. */
|
||||
|
||||
uint8_t port_id[3]; /* PortID of destination port. */
|
||||
uint8_t vp_index;
|
||||
|
||||
uint32_t crc_context_address[2]; /* Data segment address. */
|
||||
__le64 crc_context_address __packed; /* Data segment address. */
|
||||
uint16_t crc_context_len; /* Data segment length. */
|
||||
uint16_t reserved_1; /* MUST be set to 0. */
|
||||
};
|
||||
@@ -728,10 +728,7 @@ struct ct_entry_24xx {
|
||||
uint32_t rsp_byte_count;
|
||||
uint32_t cmd_byte_count;
|
||||
|
||||
uint32_t dseg_0_address[2]; /* Data segment 0 address. */
|
||||
uint32_t dseg_0_len; /* Data segment 0 length. */
|
||||
uint32_t dseg_1_address[2]; /* Data segment 1 address. */
|
||||
uint32_t dseg_1_len; /* Data segment 1 length. */
|
||||
struct dsd64 dsd[2];
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -778,9 +775,9 @@ struct els_entry_24xx {
|
||||
uint32_t rx_byte_count;
|
||||
uint32_t tx_byte_count;
|
||||
|
||||
uint32_t tx_address[2]; /* Data segment 0 address. */
|
||||
__le64 tx_address __packed; /* Data segment 0 address. */
|
||||
uint32_t tx_len; /* Data segment 0 length. */
|
||||
uint32_t rx_address[2]; /* Data segment 1 address. */
|
||||
__le64 rx_address __packed; /* Data segment 1 address. */
|
||||
uint32_t rx_len; /* Data segment 1 length. */
|
||||
};
|
||||
|
||||
@@ -1433,9 +1430,9 @@ struct vf_evfp_entry_24xx {
|
||||
uint16_t control_flags;
|
||||
uint32_t io_parameter_0;
|
||||
uint32_t io_parameter_1;
|
||||
uint32_t tx_address[2]; /* Data segment 0 address. */
|
||||
__le64 tx_address __packed; /* Data segment 0 address. */
|
||||
uint32_t tx_len; /* Data segment 0 length. */
|
||||
uint32_t rx_address[2]; /* Data segment 1 address. */
|
||||
__le64 rx_address __packed; /* Data segment 1 address. */
|
||||
uint32_t rx_len; /* Data segment 1 length. */
|
||||
};
|
||||
|
||||
@@ -1617,8 +1614,7 @@ struct verify_chip_entry_84xx {
|
||||
uint32_t fw_seq_size;
|
||||
uint32_t relative_offset;
|
||||
|
||||
uint32_t dseg_address[2];
|
||||
uint32_t dseg_length;
|
||||
struct dsd64 dsd;
|
||||
};
|
||||
|
||||
struct verify_chip_rsp_84xx {
|
||||
@@ -1675,8 +1671,7 @@ struct access_chip_84xx {
|
||||
uint32_t total_byte_cnt;
|
||||
uint32_t reserved4;
|
||||
|
||||
uint32_t dseg_address[2];
|
||||
uint32_t dseg_length;
|
||||
struct dsd64 dsd;
|
||||
};
|
||||
|
||||
struct access_chip_rsp_84xx {
|
||||
@@ -1944,15 +1939,15 @@ struct init_cb_81xx {
|
||||
|
||||
uint16_t prio_request_q_length;
|
||||
|
||||
uint32_t request_q_address[2];
|
||||
uint32_t response_q_address[2];
|
||||
uint32_t prio_request_q_address[2];
|
||||
__le64 request_q_address __packed;
|
||||
__le64 response_q_address __packed;
|
||||
__le64 prio_request_q_address __packed;
|
||||
|
||||
uint8_t reserved_4[8];
|
||||
|
||||
uint16_t atio_q_inpointer;
|
||||
uint16_t atio_q_length;
|
||||
uint32_t atio_q_address[2];
|
||||
__le64 atio_q_address __packed;
|
||||
|
||||
uint16_t interrupt_delay_timer; /* 100us increments. */
|
||||
uint16_t login_timeout;
|
||||
|
||||
@@ -38,8 +38,7 @@ extern int qla81xx_load_risc(scsi_qla_host_t *, uint32_t *);
|
||||
|
||||
extern int qla2x00_perform_loop_resync(scsi_qla_host_t *);
|
||||
extern int qla2x00_loop_resync(scsi_qla_host_t *);
|
||||
|
||||
extern int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
|
||||
extern void qla2x00_clear_loop_id(fc_port_t *fcport);
|
||||
|
||||
extern int qla2x00_fabric_login(scsi_qla_host_t *, fc_port_t *, uint16_t *);
|
||||
extern int qla2x00_local_device_login(scsi_qla_host_t *, fc_port_t *);
|
||||
@@ -80,6 +79,7 @@ int qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e);
|
||||
extern void *qla2x00_alloc_iocbs_ready(struct qla_qpair *, srb_t *);
|
||||
extern int qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *, fc_port_t *);
|
||||
|
||||
extern void qla2x00_set_fcport_state(fc_port_t *fcport, int state);
|
||||
extern fc_port_t *
|
||||
qla2x00_alloc_fcport(scsi_qla_host_t *, gfp_t );
|
||||
|
||||
@@ -285,17 +285,18 @@ extern int qla2x00_start_sp(srb_t *);
|
||||
extern int qla24xx_dif_start_scsi(srb_t *);
|
||||
extern int qla2x00_start_bidir(srb_t *, struct scsi_qla_host *, uint32_t);
|
||||
extern int qla2xxx_dif_start_scsi_mq(srb_t *);
|
||||
extern void qla2x00_init_timer(srb_t *sp, unsigned long tmo);
|
||||
extern unsigned long qla2x00_get_async_timeout(struct scsi_qla_host *);
|
||||
|
||||
extern void *qla2x00_alloc_iocbs(struct scsi_qla_host *, srb_t *);
|
||||
extern void *__qla2x00_alloc_iocbs(struct qla_qpair *, srb_t *);
|
||||
extern int qla2x00_issue_marker(scsi_qla_host_t *, int);
|
||||
extern int qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *, srb_t *,
|
||||
uint32_t *, uint16_t, struct qla_tc_param *);
|
||||
struct dsd64 *, uint16_t, struct qla_tc_param *);
|
||||
extern int qla24xx_walk_and_build_sglist(struct qla_hw_data *, srb_t *,
|
||||
uint32_t *, uint16_t, struct qla_tc_param *);
|
||||
struct dsd64 *, uint16_t, struct qla_tc_param *);
|
||||
extern int qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *, srb_t *,
|
||||
uint32_t *, uint16_t, struct qla_tgt_cmd *);
|
||||
struct dsd64 *, uint16_t, struct qla_tgt_cmd *);
|
||||
extern int qla24xx_get_one_block_sg(uint32_t, struct qla2_sgx *, uint32_t *);
|
||||
extern int qla24xx_configure_prot_mode(srb_t *, uint16_t *);
|
||||
|
||||
|
||||
+22
-29
@@ -45,13 +45,11 @@ qla2x00_prep_ms_iocb(scsi_qla_host_t *vha, struct ct_arg *arg)
|
||||
ms_pkt->rsp_bytecount = cpu_to_le32(arg->rsp_size);
|
||||
ms_pkt->req_bytecount = cpu_to_le32(arg->req_size);
|
||||
|
||||
ms_pkt->dseg_req_address[0] = cpu_to_le32(LSD(arg->req_dma));
|
||||
ms_pkt->dseg_req_address[1] = cpu_to_le32(MSD(arg->req_dma));
|
||||
ms_pkt->dseg_req_length = ms_pkt->req_bytecount;
|
||||
put_unaligned_le64(arg->req_dma, &ms_pkt->req_dsd.address);
|
||||
ms_pkt->req_dsd.length = ms_pkt->req_bytecount;
|
||||
|
||||
ms_pkt->dseg_rsp_address[0] = cpu_to_le32(LSD(arg->rsp_dma));
|
||||
ms_pkt->dseg_rsp_address[1] = cpu_to_le32(MSD(arg->rsp_dma));
|
||||
ms_pkt->dseg_rsp_length = ms_pkt->rsp_bytecount;
|
||||
put_unaligned_le64(arg->rsp_dma, &ms_pkt->rsp_dsd.address);
|
||||
ms_pkt->rsp_dsd.length = ms_pkt->rsp_bytecount;
|
||||
|
||||
vha->qla_stats.control_requests++;
|
||||
|
||||
@@ -83,13 +81,11 @@ qla24xx_prep_ms_iocb(scsi_qla_host_t *vha, struct ct_arg *arg)
|
||||
ct_pkt->rsp_byte_count = cpu_to_le32(arg->rsp_size);
|
||||
ct_pkt->cmd_byte_count = cpu_to_le32(arg->req_size);
|
||||
|
||||
ct_pkt->dseg_0_address[0] = cpu_to_le32(LSD(arg->req_dma));
|
||||
ct_pkt->dseg_0_address[1] = cpu_to_le32(MSD(arg->req_dma));
|
||||
ct_pkt->dseg_0_len = ct_pkt->cmd_byte_count;
|
||||
put_unaligned_le64(arg->req_dma, &ct_pkt->dsd[0].address);
|
||||
ct_pkt->dsd[0].length = ct_pkt->cmd_byte_count;
|
||||
|
||||
ct_pkt->dseg_1_address[0] = cpu_to_le32(LSD(arg->rsp_dma));
|
||||
ct_pkt->dseg_1_address[1] = cpu_to_le32(MSD(arg->rsp_dma));
|
||||
ct_pkt->dseg_1_len = ct_pkt->rsp_byte_count;
|
||||
put_unaligned_le64(arg->rsp_dma, &ct_pkt->dsd[1].address);
|
||||
ct_pkt->dsd[1].length = ct_pkt->rsp_byte_count;
|
||||
ct_pkt->vp_index = vha->vp_idx;
|
||||
|
||||
vha->qla_stats.control_requests++;
|
||||
@@ -1000,8 +996,7 @@ qla2x00_prep_sns_cmd(scsi_qla_host_t *vha, uint16_t cmd, uint16_t scmd_len,
|
||||
memset(sns_cmd, 0, sizeof(struct sns_cmd_pkt));
|
||||
wc = data_size / 2; /* Size in 16bit words. */
|
||||
sns_cmd->p.cmd.buffer_length = cpu_to_le16(wc);
|
||||
sns_cmd->p.cmd.buffer_address[0] = cpu_to_le32(LSD(ha->sns_cmd_dma));
|
||||
sns_cmd->p.cmd.buffer_address[1] = cpu_to_le32(MSD(ha->sns_cmd_dma));
|
||||
put_unaligned_le64(ha->sns_cmd_dma, &sns_cmd->p.cmd.buffer_address);
|
||||
sns_cmd->p.cmd.subcommand_length = cpu_to_le16(scmd_len);
|
||||
sns_cmd->p.cmd.subcommand = cpu_to_le16(cmd);
|
||||
wc = (data_size - 16) / 4; /* Size in 32bit words. */
|
||||
@@ -1385,6 +1380,7 @@ qla2x00_mgmt_svr_login(scsi_qla_host_t *vha)
|
||||
int ret, rval;
|
||||
uint16_t mb[MAILBOX_REGISTER_COUNT];
|
||||
struct qla_hw_data *ha = vha->hw;
|
||||
|
||||
ret = QLA_SUCCESS;
|
||||
if (vha->flags.management_server_logged_in)
|
||||
return ret;
|
||||
@@ -1423,6 +1419,7 @@ qla2x00_prep_ms_fdmi_iocb(scsi_qla_host_t *vha, uint32_t req_size,
|
||||
{
|
||||
ms_iocb_entry_t *ms_pkt;
|
||||
struct qla_hw_data *ha = vha->hw;
|
||||
|
||||
ms_pkt = ha->ms_iocb;
|
||||
memset(ms_pkt, 0, sizeof(ms_iocb_entry_t));
|
||||
|
||||
@@ -1436,13 +1433,11 @@ qla2x00_prep_ms_fdmi_iocb(scsi_qla_host_t *vha, uint32_t req_size,
|
||||
ms_pkt->rsp_bytecount = cpu_to_le32(rsp_size);
|
||||
ms_pkt->req_bytecount = cpu_to_le32(req_size);
|
||||
|
||||
ms_pkt->dseg_req_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma));
|
||||
ms_pkt->dseg_req_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma));
|
||||
ms_pkt->dseg_req_length = ms_pkt->req_bytecount;
|
||||
put_unaligned_le64(ha->ct_sns_dma, &ms_pkt->req_dsd.address);
|
||||
ms_pkt->req_dsd.length = ms_pkt->req_bytecount;
|
||||
|
||||
ms_pkt->dseg_rsp_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma));
|
||||
ms_pkt->dseg_rsp_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma));
|
||||
ms_pkt->dseg_rsp_length = ms_pkt->rsp_bytecount;
|
||||
put_unaligned_le64(ha->ct_sns_dma, &ms_pkt->rsp_dsd.address);
|
||||
ms_pkt->rsp_dsd.length = ms_pkt->rsp_bytecount;
|
||||
|
||||
return ms_pkt;
|
||||
}
|
||||
@@ -1474,13 +1469,11 @@ qla24xx_prep_ms_fdmi_iocb(scsi_qla_host_t *vha, uint32_t req_size,
|
||||
ct_pkt->rsp_byte_count = cpu_to_le32(rsp_size);
|
||||
ct_pkt->cmd_byte_count = cpu_to_le32(req_size);
|
||||
|
||||
ct_pkt->dseg_0_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma));
|
||||
ct_pkt->dseg_0_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma));
|
||||
ct_pkt->dseg_0_len = ct_pkt->cmd_byte_count;
|
||||
put_unaligned_le64(ha->ct_sns_dma, &ct_pkt->dsd[0].address);
|
||||
ct_pkt->dsd[0].length = ct_pkt->cmd_byte_count;
|
||||
|
||||
ct_pkt->dseg_1_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma));
|
||||
ct_pkt->dseg_1_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma));
|
||||
ct_pkt->dseg_1_len = ct_pkt->rsp_byte_count;
|
||||
put_unaligned_le64(ha->ct_sns_dma, &ct_pkt->dsd[1].address);
|
||||
ct_pkt->dsd[1].length = ct_pkt->rsp_byte_count;
|
||||
ct_pkt->vp_index = vha->vp_idx;
|
||||
|
||||
return ct_pkt;
|
||||
@@ -1495,10 +1488,10 @@ qla2x00_update_ms_fdmi_iocb(scsi_qla_host_t *vha, uint32_t req_size)
|
||||
|
||||
if (IS_FWI2_CAPABLE(ha)) {
|
||||
ct_pkt->cmd_byte_count = cpu_to_le32(req_size);
|
||||
ct_pkt->dseg_0_len = ct_pkt->cmd_byte_count;
|
||||
ct_pkt->dsd[0].length = ct_pkt->cmd_byte_count;
|
||||
} else {
|
||||
ms_pkt->req_bytecount = cpu_to_le32(req_size);
|
||||
ms_pkt->dseg_req_length = ms_pkt->req_bytecount;
|
||||
ms_pkt->req_dsd.length = ms_pkt->req_bytecount;
|
||||
}
|
||||
|
||||
return ms_pkt;
|
||||
@@ -2446,7 +2439,7 @@ qla2x00_fdmiv2_rpa(scsi_qla_host_t *vha)
|
||||
eiter->type = cpu_to_be16(FDMI_PORT_MAX_FRAME_SIZE);
|
||||
eiter->len = cpu_to_be16(4 + 4);
|
||||
eiter->a.max_frame_size = IS_FWI2_CAPABLE(ha) ?
|
||||
le16_to_cpu(icb24->frame_payload_size):
|
||||
le16_to_cpu(icb24->frame_payload_size) :
|
||||
le16_to_cpu(ha->init_cb->frame_payload_size);
|
||||
eiter->a.max_frame_size = cpu_to_be32(eiter->a.max_frame_size);
|
||||
size += 4 + 4;
|
||||
|
||||
+158
-131
@@ -94,6 +94,75 @@ qla2x00_get_async_timeout(struct scsi_qla_host *vha)
|
||||
return tmo;
|
||||
}
|
||||
|
||||
static void qla24xx_abort_iocb_timeout(void *data)
|
||||
{
|
||||
srb_t *sp = data;
|
||||
struct srb_iocb *abt = &sp->u.iocb_cmd;
|
||||
|
||||
abt->u.abt.comp_status = CS_TIMEOUT;
|
||||
sp->done(sp, QLA_FUNCTION_TIMEOUT);
|
||||
}
|
||||
|
||||
static void qla24xx_abort_sp_done(void *ptr, int res)
|
||||
{
|
||||
srb_t *sp = ptr;
|
||||
struct srb_iocb *abt = &sp->u.iocb_cmd;
|
||||
|
||||
del_timer(&sp->u.iocb_cmd.timer);
|
||||
if (sp->flags & SRB_WAKEUP_ON_COMP)
|
||||
complete(&abt->u.abt.comp);
|
||||
else
|
||||
sp->free(sp);
|
||||
}
|
||||
|
||||
int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
|
||||
{
|
||||
scsi_qla_host_t *vha = cmd_sp->vha;
|
||||
struct srb_iocb *abt_iocb;
|
||||
srb_t *sp;
|
||||
int rval = QLA_FUNCTION_FAILED;
|
||||
|
||||
sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
|
||||
GFP_ATOMIC);
|
||||
if (!sp)
|
||||
return rval;
|
||||
|
||||
abt_iocb = &sp->u.iocb_cmd;
|
||||
sp->type = SRB_ABT_CMD;
|
||||
sp->name = "abort";
|
||||
sp->qpair = cmd_sp->qpair;
|
||||
if (wait)
|
||||
sp->flags = SRB_WAKEUP_ON_COMP;
|
||||
|
||||
abt_iocb->timeout = qla24xx_abort_iocb_timeout;
|
||||
init_completion(&abt_iocb->u.abt.comp);
|
||||
/* FW can send 2 x ABTS's timeout/20s */
|
||||
qla2x00_init_timer(sp, 42);
|
||||
|
||||
abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
|
||||
abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
|
||||
|
||||
sp->done = qla24xx_abort_sp_done;
|
||||
|
||||
ql_dbg(ql_dbg_async, vha, 0x507c,
|
||||
"Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
|
||||
cmd_sp->type);
|
||||
|
||||
rval = qla2x00_start_sp(sp);
|
||||
if (rval != QLA_SUCCESS) {
|
||||
sp->free(sp);
|
||||
return rval;
|
||||
}
|
||||
|
||||
if (wait) {
|
||||
wait_for_completion(&abt_iocb->u.abt.comp);
|
||||
rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
|
||||
QLA_SUCCESS : QLA_FUNCTION_FAILED;
|
||||
}
|
||||
|
||||
return rval;
|
||||
}
|
||||
|
||||
void
|
||||
qla2x00_async_iocb_timeout(void *data)
|
||||
{
|
||||
@@ -514,6 +583,72 @@ done:
|
||||
return rval;
|
||||
}
|
||||
|
||||
static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
|
||||
{
|
||||
struct qla_hw_data *ha = vha->hw;
|
||||
|
||||
if (IS_FWI2_CAPABLE(ha))
|
||||
return loop_id > NPH_LAST_HANDLE;
|
||||
|
||||
return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
|
||||
loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
|
||||
}
|
||||
|
||||
/**
|
||||
* qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
|
||||
* @vha: adapter state pointer.
|
||||
* @dev: port structure pointer.
|
||||
*
|
||||
* Returns:
|
||||
* qla2x00 local function return status code.
|
||||
*
|
||||
* Context:
|
||||
* Kernel context.
|
||||
*/
|
||||
static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
|
||||
{
|
||||
int rval;
|
||||
struct qla_hw_data *ha = vha->hw;
|
||||
unsigned long flags = 0;
|
||||
|
||||
rval = QLA_SUCCESS;
|
||||
|
||||
spin_lock_irqsave(&ha->vport_slock, flags);
|
||||
|
||||
dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE);
|
||||
if (dev->loop_id >= LOOPID_MAP_SIZE ||
|
||||
qla2x00_is_reserved_id(vha, dev->loop_id)) {
|
||||
dev->loop_id = FC_NO_LOOP_ID;
|
||||
rval = QLA_FUNCTION_FAILED;
|
||||
} else {
|
||||
set_bit(dev->loop_id, ha->loop_id_map);
|
||||
}
|
||||
spin_unlock_irqrestore(&ha->vport_slock, flags);
|
||||
|
||||
if (rval == QLA_SUCCESS)
|
||||
ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
|
||||
"Assigning new loopid=%x, portid=%x.\n",
|
||||
dev->loop_id, dev->d_id.b24);
|
||||
else
|
||||
ql_log(ql_log_warn, dev->vha, 0x2087,
|
||||
"No loop_id's available, portid=%x.\n",
|
||||
dev->d_id.b24);
|
||||
|
||||
return rval;
|
||||
}
|
||||
|
||||
void qla2x00_clear_loop_id(fc_port_t *fcport)
|
||||
{
|
||||
struct qla_hw_data *ha = fcport->vha->hw;
|
||||
|
||||
if (fcport->loop_id == FC_NO_LOOP_ID ||
|
||||
qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
|
||||
return;
|
||||
|
||||
clear_bit(fcport->loop_id, ha->loop_id_map);
|
||||
fcport->loop_id = FC_NO_LOOP_ID;
|
||||
}
|
||||
|
||||
static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
|
||||
struct event_arg *ea)
|
||||
{
|
||||
@@ -1715,78 +1850,6 @@ done:
|
||||
return rval;
|
||||
}
|
||||
|
||||
static void
|
||||
qla24xx_abort_iocb_timeout(void *data)
|
||||
{
|
||||
srb_t *sp = data;
|
||||
struct srb_iocb *abt = &sp->u.iocb_cmd;
|
||||
|
||||
abt->u.abt.comp_status = CS_TIMEOUT;
|
||||
sp->done(sp, QLA_FUNCTION_TIMEOUT);
|
||||
}
|
||||
|
||||
static void
|
||||
qla24xx_abort_sp_done(void *ptr, int res)
|
||||
{
|
||||
srb_t *sp = ptr;
|
||||
struct srb_iocb *abt = &sp->u.iocb_cmd;
|
||||
|
||||
del_timer(&sp->u.iocb_cmd.timer);
|
||||
if (sp->flags & SRB_WAKEUP_ON_COMP)
|
||||
complete(&abt->u.abt.comp);
|
||||
else
|
||||
sp->free(sp);
|
||||
}
|
||||
|
||||
int
|
||||
qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
|
||||
{
|
||||
scsi_qla_host_t *vha = cmd_sp->vha;
|
||||
struct srb_iocb *abt_iocb;
|
||||
srb_t *sp;
|
||||
int rval = QLA_FUNCTION_FAILED;
|
||||
|
||||
sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
|
||||
GFP_ATOMIC);
|
||||
if (!sp)
|
||||
return rval;
|
||||
|
||||
abt_iocb = &sp->u.iocb_cmd;
|
||||
sp->type = SRB_ABT_CMD;
|
||||
sp->name = "abort";
|
||||
sp->qpair = cmd_sp->qpair;
|
||||
if (wait)
|
||||
sp->flags = SRB_WAKEUP_ON_COMP;
|
||||
|
||||
abt_iocb->timeout = qla24xx_abort_iocb_timeout;
|
||||
init_completion(&abt_iocb->u.abt.comp);
|
||||
/* FW can send 2 x ABTS's timeout/20s */
|
||||
qla2x00_init_timer(sp, 42);
|
||||
|
||||
abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
|
||||
abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
|
||||
|
||||
sp->done = qla24xx_abort_sp_done;
|
||||
|
||||
ql_dbg(ql_dbg_async, vha, 0x507c,
|
||||
"Abort command issued - hdl=%x, type=%x\n",
|
||||
cmd_sp->handle, cmd_sp->type);
|
||||
|
||||
rval = qla2x00_start_sp(sp);
|
||||
if (rval != QLA_SUCCESS) {
|
||||
sp->free(sp);
|
||||
return rval;
|
||||
}
|
||||
|
||||
if (wait) {
|
||||
wait_for_completion(&abt_iocb->u.abt.comp);
|
||||
rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
|
||||
QLA_SUCCESS : QLA_FUNCTION_FAILED;
|
||||
}
|
||||
|
||||
return rval;
|
||||
}
|
||||
|
||||
int
|
||||
qla24xx_async_abort_command(srb_t *sp)
|
||||
{
|
||||
@@ -3869,10 +3932,8 @@ qla2x00_config_rings(struct scsi_qla_host *vha)
|
||||
ha->init_cb->response_q_inpointer = cpu_to_le16(0);
|
||||
ha->init_cb->request_q_length = cpu_to_le16(req->length);
|
||||
ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
|
||||
ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
|
||||
ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
|
||||
ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
|
||||
ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
|
||||
put_unaligned_le64(req->dma, &ha->init_cb->request_q_address);
|
||||
put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address);
|
||||
|
||||
WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
|
||||
WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
|
||||
@@ -3899,16 +3960,13 @@ qla24xx_config_rings(struct scsi_qla_host *vha)
|
||||
icb->response_q_inpointer = cpu_to_le16(0);
|
||||
icb->request_q_length = cpu_to_le16(req->length);
|
||||
icb->response_q_length = cpu_to_le16(rsp->length);
|
||||
icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
|
||||
icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
|
||||
icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
|
||||
icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
|
||||
put_unaligned_le64(req->dma, &icb->request_q_address);
|
||||
put_unaligned_le64(rsp->dma, &icb->response_q_address);
|
||||
|
||||
/* Setup ATIO queue dma pointers for target mode */
|
||||
icb->atio_q_inpointer = cpu_to_le16(0);
|
||||
icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
|
||||
icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
|
||||
icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
|
||||
put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address);
|
||||
|
||||
if (IS_SHADOW_REG_CAPABLE(ha))
|
||||
icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
|
||||
@@ -4748,6 +4806,24 @@ qla2x00_rport_del(void *data)
|
||||
}
|
||||
}
|
||||
|
||||
void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
|
||||
{
|
||||
int old_state;
|
||||
|
||||
old_state = atomic_read(&fcport->state);
|
||||
atomic_set(&fcport->state, state);
|
||||
|
||||
/* Don't print state transitions during initial allocation of fcport */
|
||||
if (old_state && old_state != state) {
|
||||
ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
|
||||
"FCPort %s state transitioned from %s to %s - "
|
||||
"portid=%02x%02x%02x.\n", wwn_to_str(fcport->port_name),
|
||||
port_state_str[old_state], port_state_str[state],
|
||||
fcport->d_id.b.domain, fcport->d_id.b.area,
|
||||
fcport->d_id.b.al_pa);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* qla2x00_alloc_fcport() - Allocate a generic fcport.
|
||||
* @vha: HA context
|
||||
@@ -5853,55 +5929,6 @@ qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
|
||||
return (rval);
|
||||
}
|
||||
|
||||
/*
|
||||
* qla2x00_find_new_loop_id
|
||||
* Scan through our port list and find a new usable loop ID.
|
||||
*
|
||||
* Input:
|
||||
* ha: adapter state pointer.
|
||||
* dev: port structure pointer.
|
||||
*
|
||||
* Returns:
|
||||
* qla2x00 local function return status code.
|
||||
*
|
||||
* Context:
|
||||
* Kernel context.
|
||||
*/
|
||||
int
|
||||
qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
|
||||
{
|
||||
int rval;
|
||||
struct qla_hw_data *ha = vha->hw;
|
||||
unsigned long flags = 0;
|
||||
|
||||
rval = QLA_SUCCESS;
|
||||
|
||||
spin_lock_irqsave(&ha->vport_slock, flags);
|
||||
|
||||
dev->loop_id = find_first_zero_bit(ha->loop_id_map,
|
||||
LOOPID_MAP_SIZE);
|
||||
if (dev->loop_id >= LOOPID_MAP_SIZE ||
|
||||
qla2x00_is_reserved_id(vha, dev->loop_id)) {
|
||||
dev->loop_id = FC_NO_LOOP_ID;
|
||||
rval = QLA_FUNCTION_FAILED;
|
||||
} else
|
||||
set_bit(dev->loop_id, ha->loop_id_map);
|
||||
|
||||
spin_unlock_irqrestore(&ha->vport_slock, flags);
|
||||
|
||||
if (rval == QLA_SUCCESS)
|
||||
ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
|
||||
"Assigning new loopid=%x, portid=%x.\n",
|
||||
dev->loop_id, dev->d_id.b24);
|
||||
else
|
||||
ql_log(ql_log_warn, dev->vha, 0x2087,
|
||||
"No loop_id's available, portid=%x.\n",
|
||||
dev->d_id.b24);
|
||||
|
||||
return (rval);
|
||||
}
|
||||
|
||||
|
||||
/* FW does not set aside Loop id for MGMT Server/FFFFFAh */
|
||||
int
|
||||
qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
|
||||
|
||||
@@ -97,43 +97,6 @@ host_to_adap(uint8_t *src, uint8_t *dst, uint32_t bsize)
|
||||
*odest++ = cpu_to_le32(*isrc);
|
||||
}
|
||||
|
||||
static inline void
|
||||
qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (IS_FWI2_CAPABLE(ha))
|
||||
return;
|
||||
|
||||
for (i = 0; i < SNS_FIRST_LOOP_ID; i++)
|
||||
set_bit(i, ha->loop_id_map);
|
||||
set_bit(MANAGEMENT_SERVER, ha->loop_id_map);
|
||||
set_bit(BROADCAST, ha->loop_id_map);
|
||||
}
|
||||
|
||||
static inline int
|
||||
qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
|
||||
{
|
||||
struct qla_hw_data *ha = vha->hw;
|
||||
if (IS_FWI2_CAPABLE(ha))
|
||||
return (loop_id > NPH_LAST_HANDLE);
|
||||
|
||||
return ((loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
|
||||
loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST);
|
||||
}
|
||||
|
||||
static inline void
|
||||
qla2x00_clear_loop_id(fc_port_t *fcport) {
|
||||
struct qla_hw_data *ha = fcport->vha->hw;
|
||||
|
||||
if (fcport->loop_id == FC_NO_LOOP_ID ||
|
||||
qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
|
||||
return;
|
||||
|
||||
clear_bit(fcport->loop_id, ha->loop_id_map);
|
||||
fcport->loop_id = FC_NO_LOOP_ID;
|
||||
}
|
||||
|
||||
static inline void
|
||||
qla2x00_clean_dsd_pool(struct qla_hw_data *ha, struct crc_context *ctx)
|
||||
{
|
||||
@@ -163,25 +126,6 @@ static inline const char *wwn_to_str(const u8 port_name[8])
|
||||
return wwn;
|
||||
}
|
||||
|
||||
static inline void
|
||||
qla2x00_set_fcport_state(fc_port_t *fcport, int state)
|
||||
{
|
||||
int old_state;
|
||||
|
||||
old_state = atomic_read(&fcport->state);
|
||||
atomic_set(&fcport->state, state);
|
||||
|
||||
/* Don't print state transitions during initial allocation of fcport */
|
||||
if (old_state && old_state != state) {
|
||||
ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
|
||||
"FCPort %s state transitioned from %s to %s - "
|
||||
"portid=%02x%02x%02x.\n", wwn_to_str(fcport->port_name),
|
||||
port_state_str[old_state], port_state_str[state],
|
||||
fcport->d_id.b.domain, fcport->d_id.b.area,
|
||||
fcport->d_id.b.al_pa);
|
||||
}
|
||||
}
|
||||
|
||||
static inline int
|
||||
qla2x00_hba_err_chk_enabled(srb_t *sp)
|
||||
{
|
||||
@@ -296,17 +240,6 @@ qla2x00_rel_sp(srb_t *sp)
|
||||
qla2xxx_rel_qpair_sp(sp->qpair, sp);
|
||||
}
|
||||
|
||||
static inline void
|
||||
qla2x00_init_timer(srb_t *sp, unsigned long tmo)
|
||||
{
|
||||
timer_setup(&sp->u.iocb_cmd.timer, qla2x00_sp_timeout, 0);
|
||||
sp->u.iocb_cmd.timer.expires = jiffies + tmo * HZ;
|
||||
sp->free = qla2x00_sp_free;
|
||||
if (IS_QLAFX00(sp->vha->hw) && (sp->type == SRB_FXIOCB_DCMD))
|
||||
init_completion(&sp->u.iocb_cmd.u.fxiocb.fxiocb_comp);
|
||||
add_timer(&sp->u.iocb_cmd.timer);
|
||||
}
|
||||
|
||||
static inline int
|
||||
qla2x00_gid_list_size(struct qla_hw_data *ha)
|
||||
{
|
||||
|
||||
+125
-191
@@ -192,7 +192,7 @@ void qla2x00_build_scsi_iocbs_32(srb_t *sp, cmd_entry_t *cmd_pkt,
|
||||
uint16_t tot_dsds)
|
||||
{
|
||||
uint16_t avail_dsds;
|
||||
uint32_t *cur_dsd;
|
||||
struct dsd32 *cur_dsd;
|
||||
scsi_qla_host_t *vha;
|
||||
struct scsi_cmnd *cmd;
|
||||
struct scatterlist *sg;
|
||||
@@ -213,8 +213,8 @@ void qla2x00_build_scsi_iocbs_32(srb_t *sp, cmd_entry_t *cmd_pkt,
|
||||
cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
|
||||
|
||||
/* Three DSDs are available in the Command Type 2 IOCB */
|
||||
avail_dsds = 3;
|
||||
cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
|
||||
avail_dsds = ARRAY_SIZE(cmd_pkt->dsd32);
|
||||
cur_dsd = cmd_pkt->dsd32;
|
||||
|
||||
/* Load data segments */
|
||||
scsi_for_each_sg(cmd, sg, tot_dsds, i) {
|
||||
@@ -227,12 +227,11 @@ void qla2x00_build_scsi_iocbs_32(srb_t *sp, cmd_entry_t *cmd_pkt,
|
||||
* Type 0 IOCB.
|
||||
*/
|
||||
cont_pkt = qla2x00_prep_cont_type0_iocb(vha);
|
||||
cur_dsd = (uint32_t *)&cont_pkt->dseg_0_address;
|
||||
avail_dsds = 7;
|
||||
cur_dsd = cont_pkt->dsd;
|
||||
avail_dsds = ARRAY_SIZE(cont_pkt->dsd);
|
||||
}
|
||||
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_address(sg));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
|
||||
append_dsd32(&cur_dsd, sg);
|
||||
avail_dsds--;
|
||||
}
|
||||
}
|
||||
@@ -249,7 +248,7 @@ void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt,
|
||||
uint16_t tot_dsds)
|
||||
{
|
||||
uint16_t avail_dsds;
|
||||
uint32_t *cur_dsd;
|
||||
struct dsd64 *cur_dsd;
|
||||
scsi_qla_host_t *vha;
|
||||
struct scsi_cmnd *cmd;
|
||||
struct scatterlist *sg;
|
||||
@@ -270,12 +269,11 @@ void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt,
|
||||
cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
|
||||
|
||||
/* Two DSDs are available in the Command Type 3 IOCB */
|
||||
avail_dsds = 2;
|
||||
cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
|
||||
avail_dsds = ARRAY_SIZE(cmd_pkt->dsd64);
|
||||
cur_dsd = cmd_pkt->dsd64;
|
||||
|
||||
/* Load data segments */
|
||||
scsi_for_each_sg(cmd, sg, tot_dsds, i) {
|
||||
dma_addr_t sle_dma;
|
||||
cont_a64_entry_t *cont_pkt;
|
||||
|
||||
/* Allocate additional continuation packets? */
|
||||
@@ -285,14 +283,11 @@ void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt,
|
||||
* Type 1 IOCB.
|
||||
*/
|
||||
cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
|
||||
cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
|
||||
avail_dsds = 5;
|
||||
cur_dsd = cont_pkt->dsd;
|
||||
avail_dsds = ARRAY_SIZE(cont_pkt->dsd);
|
||||
}
|
||||
|
||||
sle_dma = sg_dma_address(sg);
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
|
||||
append_dsd64(&cur_dsd, sg);
|
||||
avail_dsds--;
|
||||
}
|
||||
}
|
||||
@@ -578,13 +573,11 @@ static inline int
|
||||
qla24xx_build_scsi_type_6_iocbs(srb_t *sp, struct cmd_type_6 *cmd_pkt,
|
||||
uint16_t tot_dsds)
|
||||
{
|
||||
uint32_t *cur_dsd = NULL;
|
||||
struct dsd64 *cur_dsd = NULL, *next_dsd;
|
||||
scsi_qla_host_t *vha;
|
||||
struct qla_hw_data *ha;
|
||||
struct scsi_cmnd *cmd;
|
||||
struct scatterlist *cur_seg;
|
||||
uint32_t *dsd_seg;
|
||||
void *next_dsd;
|
||||
uint8_t avail_dsds;
|
||||
uint8_t first_iocb = 1;
|
||||
uint32_t dsd_list_len;
|
||||
@@ -636,32 +629,27 @@ qla24xx_build_scsi_type_6_iocbs(srb_t *sp, struct cmd_type_6 *cmd_pkt,
|
||||
|
||||
if (first_iocb) {
|
||||
first_iocb = 0;
|
||||
dsd_seg = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
|
||||
*dsd_seg++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
|
||||
*dsd_seg++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
|
||||
cmd_pkt->fcp_data_dseg_len = cpu_to_le32(dsd_list_len);
|
||||
put_unaligned_le64(dsd_ptr->dsd_list_dma,
|
||||
&cmd_pkt->fcp_dsd.address);
|
||||
cmd_pkt->fcp_dsd.length = cpu_to_le32(dsd_list_len);
|
||||
} else {
|
||||
*cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
|
||||
*cur_dsd++ = cpu_to_le32(dsd_list_len);
|
||||
put_unaligned_le64(dsd_ptr->dsd_list_dma,
|
||||
&cur_dsd->address);
|
||||
cur_dsd->length = cpu_to_le32(dsd_list_len);
|
||||
cur_dsd++;
|
||||
}
|
||||
cur_dsd = (uint32_t *)next_dsd;
|
||||
cur_dsd = next_dsd;
|
||||
while (avail_dsds) {
|
||||
dma_addr_t sle_dma;
|
||||
|
||||
sle_dma = sg_dma_address(cur_seg);
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(cur_seg));
|
||||
append_dsd64(&cur_dsd, cur_seg);
|
||||
cur_seg = sg_next(cur_seg);
|
||||
avail_dsds--;
|
||||
}
|
||||
}
|
||||
|
||||
/* Null termination */
|
||||
*cur_dsd++ = 0;
|
||||
*cur_dsd++ = 0;
|
||||
*cur_dsd++ = 0;
|
||||
cur_dsd->address = 0;
|
||||
cur_dsd->length = 0;
|
||||
cur_dsd++;
|
||||
cmd_pkt->control_flags |= CF_DATA_SEG_DESCR_ENABLE;
|
||||
return 0;
|
||||
}
|
||||
@@ -700,7 +688,7 @@ qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,
|
||||
uint16_t tot_dsds, struct req_que *req)
|
||||
{
|
||||
uint16_t avail_dsds;
|
||||
uint32_t *cur_dsd;
|
||||
struct dsd64 *cur_dsd;
|
||||
scsi_qla_host_t *vha;
|
||||
struct scsi_cmnd *cmd;
|
||||
struct scatterlist *sg;
|
||||
@@ -732,12 +720,11 @@ qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,
|
||||
|
||||
/* One DSD is available in the Command Type 3 IOCB */
|
||||
avail_dsds = 1;
|
||||
cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
|
||||
cur_dsd = &cmd_pkt->dsd;
|
||||
|
||||
/* Load data segments */
|
||||
|
||||
scsi_for_each_sg(cmd, sg, tot_dsds, i) {
|
||||
dma_addr_t sle_dma;
|
||||
cont_a64_entry_t *cont_pkt;
|
||||
|
||||
/* Allocate additional continuation packets? */
|
||||
@@ -747,14 +734,11 @@ qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,
|
||||
* Type 1 IOCB.
|
||||
*/
|
||||
cont_pkt = qla2x00_prep_cont_type1_iocb(vha, req);
|
||||
cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
|
||||
avail_dsds = 5;
|
||||
cur_dsd = cont_pkt->dsd;
|
||||
avail_dsds = ARRAY_SIZE(cont_pkt->dsd);
|
||||
}
|
||||
|
||||
sle_dma = sg_dma_address(sg);
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
|
||||
append_dsd64(&cur_dsd, sg);
|
||||
avail_dsds--;
|
||||
}
|
||||
}
|
||||
@@ -890,14 +874,14 @@ qla24xx_get_one_block_sg(uint32_t blk_sz, struct qla2_sgx *sgx,
|
||||
|
||||
int
|
||||
qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *ha, srb_t *sp,
|
||||
uint32_t *dsd, uint16_t tot_dsds, struct qla_tc_param *tc)
|
||||
struct dsd64 *dsd, uint16_t tot_dsds, struct qla_tc_param *tc)
|
||||
{
|
||||
void *next_dsd;
|
||||
uint8_t avail_dsds = 0;
|
||||
uint32_t dsd_list_len;
|
||||
struct dsd_dma *dsd_ptr;
|
||||
struct scatterlist *sg_prot;
|
||||
uint32_t *cur_dsd = dsd;
|
||||
struct dsd64 *cur_dsd = dsd;
|
||||
uint16_t used_dsds = tot_dsds;
|
||||
uint32_t prot_int; /* protection interval */
|
||||
uint32_t partial;
|
||||
@@ -971,14 +955,14 @@ alloc_and_fill:
|
||||
|
||||
|
||||
/* add new list to cmd iocb or last list */
|
||||
*cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
|
||||
*cur_dsd++ = dsd_list_len;
|
||||
cur_dsd = (uint32_t *)next_dsd;
|
||||
put_unaligned_le64(dsd_ptr->dsd_list_dma,
|
||||
&cur_dsd->address);
|
||||
cur_dsd->length = cpu_to_le32(dsd_list_len);
|
||||
cur_dsd = next_dsd;
|
||||
}
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sle_dma_len);
|
||||
put_unaligned_le64(sle_dma, &cur_dsd->address);
|
||||
cur_dsd->length = cpu_to_le32(sle_dma_len);
|
||||
cur_dsd++;
|
||||
avail_dsds--;
|
||||
|
||||
if (partial == 0) {
|
||||
@@ -997,22 +981,22 @@ alloc_and_fill:
|
||||
}
|
||||
}
|
||||
/* Null termination */
|
||||
*cur_dsd++ = 0;
|
||||
*cur_dsd++ = 0;
|
||||
*cur_dsd++ = 0;
|
||||
cur_dsd->address = 0;
|
||||
cur_dsd->length = 0;
|
||||
cur_dsd++;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd,
|
||||
uint16_t tot_dsds, struct qla_tc_param *tc)
|
||||
qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp,
|
||||
struct dsd64 *dsd, uint16_t tot_dsds, struct qla_tc_param *tc)
|
||||
{
|
||||
void *next_dsd;
|
||||
uint8_t avail_dsds = 0;
|
||||
uint32_t dsd_list_len;
|
||||
struct dsd_dma *dsd_ptr;
|
||||
struct scatterlist *sg, *sgl;
|
||||
uint32_t *cur_dsd = dsd;
|
||||
struct dsd64 *cur_dsd = dsd;
|
||||
int i;
|
||||
uint16_t used_dsds = tot_dsds;
|
||||
struct scsi_cmnd *cmd;
|
||||
@@ -1029,8 +1013,6 @@ qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd,
|
||||
|
||||
|
||||
for_each_sg(sgl, sg, tot_dsds, i) {
|
||||
dma_addr_t sle_dma;
|
||||
|
||||
/* Allocate additional continuation packets? */
|
||||
if (avail_dsds == 0) {
|
||||
avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
|
||||
@@ -1070,30 +1052,26 @@ qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd,
|
||||
}
|
||||
|
||||
/* add new list to cmd iocb or last list */
|
||||
*cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
|
||||
*cur_dsd++ = dsd_list_len;
|
||||
cur_dsd = (uint32_t *)next_dsd;
|
||||
put_unaligned_le64(dsd_ptr->dsd_list_dma,
|
||||
&cur_dsd->address);
|
||||
cur_dsd->length = cpu_to_le32(dsd_list_len);
|
||||
cur_dsd = next_dsd;
|
||||
}
|
||||
sle_dma = sg_dma_address(sg);
|
||||
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
|
||||
append_dsd64(&cur_dsd, sg);
|
||||
avail_dsds--;
|
||||
|
||||
}
|
||||
/* Null termination */
|
||||
*cur_dsd++ = 0;
|
||||
*cur_dsd++ = 0;
|
||||
*cur_dsd++ = 0;
|
||||
cur_dsd->address = 0;
|
||||
cur_dsd->length = 0;
|
||||
cur_dsd++;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if QLA_ENABLE_PI
|
||||
int
|
||||
qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
|
||||
uint32_t *cur_dsd, uint16_t tot_dsds, struct qla_tgt_cmd *tc)
|
||||
struct dsd64 *cur_dsd, uint16_t tot_dsds, struct qla_tgt_cmd *tc)
|
||||
{
|
||||
struct dsd_dma *dsd_ptr = NULL, *dif_dsd, *nxt_dsd;
|
||||
struct scatterlist *sg, *sgl;
|
||||
@@ -1313,16 +1291,15 @@ qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
|
||||
}
|
||||
|
||||
/* add new list to cmd iocb or last list */
|
||||
*cur_dsd++ =
|
||||
cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
|
||||
*cur_dsd++ =
|
||||
cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
|
||||
*cur_dsd++ = dsd_list_len;
|
||||
put_unaligned_le64(dsd_ptr->dsd_list_dma,
|
||||
&cur_dsd->address);
|
||||
cur_dsd->length = cpu_to_le32(dsd_list_len);
|
||||
cur_dsd = dsd_ptr->dsd_addr;
|
||||
}
|
||||
*cur_dsd++ = cpu_to_le32(LSD(dif_dsd->dsd_list_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(dif_dsd->dsd_list_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sglen);
|
||||
put_unaligned_le64(dif_dsd->dsd_list_dma,
|
||||
&cur_dsd->address);
|
||||
cur_dsd->length = cpu_to_le32(sglen);
|
||||
cur_dsd++;
|
||||
avail_dsds--;
|
||||
difctx->dif_bundl_len -= sglen;
|
||||
track_difbundl_buf--;
|
||||
@@ -1333,8 +1310,6 @@ qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
|
||||
difctx->no_ldif_dsd, difctx->no_dif_bundl);
|
||||
} else {
|
||||
for_each_sg(sgl, sg, tot_dsds, i) {
|
||||
dma_addr_t sle_dma;
|
||||
|
||||
/* Allocate additional continuation packets? */
|
||||
if (avail_dsds == 0) {
|
||||
avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
|
||||
@@ -1374,24 +1349,19 @@ qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
|
||||
}
|
||||
|
||||
/* add new list to cmd iocb or last list */
|
||||
*cur_dsd++ =
|
||||
cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
|
||||
*cur_dsd++ =
|
||||
cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
|
||||
*cur_dsd++ = dsd_list_len;
|
||||
put_unaligned_le64(dsd_ptr->dsd_list_dma,
|
||||
&cur_dsd->address);
|
||||
cur_dsd->length = cpu_to_le32(dsd_list_len);
|
||||
cur_dsd = dsd_ptr->dsd_addr;
|
||||
}
|
||||
sle_dma = sg_dma_address(sg);
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
|
||||
append_dsd64(&cur_dsd, sg);
|
||||
avail_dsds--;
|
||||
}
|
||||
}
|
||||
/* Null termination */
|
||||
*cur_dsd++ = 0;
|
||||
*cur_dsd++ = 0;
|
||||
*cur_dsd++ = 0;
|
||||
cur_dsd->address = 0;
|
||||
cur_dsd->length = 0;
|
||||
cur_dsd++;
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
@@ -1410,7 +1380,8 @@ static inline int
|
||||
qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
|
||||
uint16_t tot_dsds, uint16_t tot_prot_dsds, uint16_t fw_prot_opts)
|
||||
{
|
||||
uint32_t *cur_dsd, *fcp_dl;
|
||||
struct dsd64 *cur_dsd;
|
||||
uint32_t *fcp_dl;
|
||||
scsi_qla_host_t *vha;
|
||||
struct scsi_cmnd *cmd;
|
||||
uint32_t total_bytes = 0;
|
||||
@@ -1476,8 +1447,7 @@ qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
|
||||
qla24xx_set_t10dif_tags(sp, (struct fw_dif_context *)
|
||||
&crc_ctx_pkt->ref_tag, tot_prot_dsds);
|
||||
|
||||
cmd_pkt->crc_context_address[0] = cpu_to_le32(LSD(crc_ctx_dma));
|
||||
cmd_pkt->crc_context_address[1] = cpu_to_le32(MSD(crc_ctx_dma));
|
||||
put_unaligned_le64(crc_ctx_dma, &cmd_pkt->crc_context_address);
|
||||
cmd_pkt->crc_context_len = CRC_CONTEXT_LEN_FW;
|
||||
|
||||
/* Determine SCSI command length -- align to 4 byte boundary */
|
||||
@@ -1504,10 +1474,8 @@ qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
|
||||
int_to_scsilun(cmd->device->lun, &fcp_cmnd->lun);
|
||||
memcpy(fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
|
||||
cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(fcp_cmnd_len);
|
||||
cmd_pkt->fcp_cmnd_dseg_address[0] = cpu_to_le32(
|
||||
LSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
|
||||
cmd_pkt->fcp_cmnd_dseg_address[1] = cpu_to_le32(
|
||||
MSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
|
||||
put_unaligned_le64(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF,
|
||||
&cmd_pkt->fcp_cmnd_dseg_address);
|
||||
fcp_cmnd->task_management = 0;
|
||||
fcp_cmnd->task_attribute = TSK_SIMPLE;
|
||||
|
||||
@@ -1549,7 +1517,7 @@ qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
|
||||
}
|
||||
|
||||
if (!bundling) {
|
||||
cur_dsd = (uint32_t *) &crc_ctx_pkt->u.nobundling.data_address;
|
||||
cur_dsd = &crc_ctx_pkt->u.nobundling.data_dsd;
|
||||
} else {
|
||||
/*
|
||||
* Configure Bundling if we need to fetch interlaving
|
||||
@@ -1559,7 +1527,7 @@ qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
|
||||
crc_ctx_pkt->u.bundling.dif_byte_count = cpu_to_le32(dif_bytes);
|
||||
crc_ctx_pkt->u.bundling.dseg_count = cpu_to_le16(tot_dsds -
|
||||
tot_prot_dsds);
|
||||
cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.data_address;
|
||||
cur_dsd = &crc_ctx_pkt->u.bundling.data_dsd;
|
||||
}
|
||||
|
||||
/* Finish the common fields of CRC pkt */
|
||||
@@ -1593,7 +1561,7 @@ qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
|
||||
#if QLA_ENABLE_PI
|
||||
/* Walks dif segments */
|
||||
cmd_pkt->control_flags |= cpu_to_le16(CF_DIF_SEG_DESCR_ENABLE);
|
||||
cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.dif_address;
|
||||
cur_dsd = &crc_ctx_pkt->u.bundling.dif_dsd;
|
||||
if (qla24xx_walk_and_build_prot_sglist(ha, sp, cur_dsd,
|
||||
tot_prot_dsds, NULL))
|
||||
goto crc_queuing_error;
|
||||
@@ -2571,6 +2539,16 @@ qla24xx_tm_iocb(srb_t *sp, struct tsk_mgmt_entry *tsk)
|
||||
}
|
||||
}
|
||||
|
||||
void qla2x00_init_timer(srb_t *sp, unsigned long tmo)
|
||||
{
|
||||
timer_setup(&sp->u.iocb_cmd.timer, qla2x00_sp_timeout, 0);
|
||||
sp->u.iocb_cmd.timer.expires = jiffies + tmo * HZ;
|
||||
sp->free = qla2x00_sp_free;
|
||||
if (IS_QLAFX00(sp->vha->hw) && sp->type == SRB_FXIOCB_DCMD)
|
||||
init_completion(&sp->u.iocb_cmd.u.fxiocb.fxiocb_comp);
|
||||
add_timer(&sp->u.iocb_cmd.timer);
|
||||
}
|
||||
|
||||
static void
|
||||
qla2x00_els_dcmd_sp_free(void *data)
|
||||
{
|
||||
@@ -2732,18 +2710,13 @@ qla24xx_els_logo_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
|
||||
if (elsio->u.els_logo.els_cmd == ELS_DCMD_PLOGI) {
|
||||
els_iocb->tx_byte_count = els_iocb->tx_len =
|
||||
sizeof(struct els_plogi_payload);
|
||||
els_iocb->tx_address[0] =
|
||||
cpu_to_le32(LSD(elsio->u.els_plogi.els_plogi_pyld_dma));
|
||||
els_iocb->tx_address[1] =
|
||||
cpu_to_le32(MSD(elsio->u.els_plogi.els_plogi_pyld_dma));
|
||||
|
||||
put_unaligned_le64(elsio->u.els_plogi.els_plogi_pyld_dma,
|
||||
&els_iocb->tx_address);
|
||||
els_iocb->rx_dsd_count = 1;
|
||||
els_iocb->rx_byte_count = els_iocb->rx_len =
|
||||
sizeof(struct els_plogi_payload);
|
||||
els_iocb->rx_address[0] =
|
||||
cpu_to_le32(LSD(elsio->u.els_plogi.els_resp_pyld_dma));
|
||||
els_iocb->rx_address[1] =
|
||||
cpu_to_le32(MSD(elsio->u.els_plogi.els_resp_pyld_dma));
|
||||
put_unaligned_le64(elsio->u.els_plogi.els_resp_pyld_dma,
|
||||
&els_iocb->rx_address);
|
||||
|
||||
ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3073,
|
||||
"PLOGI ELS IOCB:\n");
|
||||
@@ -2751,15 +2724,12 @@ qla24xx_els_logo_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
|
||||
(uint8_t *)els_iocb, 0x70);
|
||||
} else {
|
||||
els_iocb->tx_byte_count = sizeof(struct els_logo_payload);
|
||||
els_iocb->tx_address[0] =
|
||||
cpu_to_le32(LSD(elsio->u.els_logo.els_logo_pyld_dma));
|
||||
els_iocb->tx_address[1] =
|
||||
cpu_to_le32(MSD(elsio->u.els_logo.els_logo_pyld_dma));
|
||||
put_unaligned_le64(elsio->u.els_logo.els_logo_pyld_dma,
|
||||
&els_iocb->tx_address);
|
||||
els_iocb->tx_len = cpu_to_le32(sizeof(struct els_logo_payload));
|
||||
|
||||
els_iocb->rx_byte_count = 0;
|
||||
els_iocb->rx_address[0] = 0;
|
||||
els_iocb->rx_address[1] = 0;
|
||||
els_iocb->rx_address = 0;
|
||||
els_iocb->rx_len = 0;
|
||||
}
|
||||
|
||||
@@ -2986,17 +2956,13 @@ qla24xx_els_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
|
||||
els_iocb->tx_byte_count =
|
||||
cpu_to_le32(bsg_job->request_payload.payload_len);
|
||||
|
||||
els_iocb->tx_address[0] = cpu_to_le32(LSD(sg_dma_address
|
||||
(bsg_job->request_payload.sg_list)));
|
||||
els_iocb->tx_address[1] = cpu_to_le32(MSD(sg_dma_address
|
||||
(bsg_job->request_payload.sg_list)));
|
||||
put_unaligned_le64(sg_dma_address(bsg_job->request_payload.sg_list),
|
||||
&els_iocb->tx_address);
|
||||
els_iocb->tx_len = cpu_to_le32(sg_dma_len
|
||||
(bsg_job->request_payload.sg_list));
|
||||
|
||||
els_iocb->rx_address[0] = cpu_to_le32(LSD(sg_dma_address
|
||||
(bsg_job->reply_payload.sg_list)));
|
||||
els_iocb->rx_address[1] = cpu_to_le32(MSD(sg_dma_address
|
||||
(bsg_job->reply_payload.sg_list)));
|
||||
put_unaligned_le64(sg_dma_address(bsg_job->reply_payload.sg_list),
|
||||
&els_iocb->rx_address);
|
||||
els_iocb->rx_len = cpu_to_le32(sg_dma_len
|
||||
(bsg_job->reply_payload.sg_list));
|
||||
|
||||
@@ -3007,7 +2973,7 @@ static void
|
||||
qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb)
|
||||
{
|
||||
uint16_t avail_dsds;
|
||||
uint32_t *cur_dsd;
|
||||
struct dsd64 *cur_dsd;
|
||||
struct scatterlist *sg;
|
||||
int index;
|
||||
uint16_t tot_dsds;
|
||||
@@ -3018,7 +2984,6 @@ qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb)
|
||||
#else
|
||||
struct bsg_job *bsg_job = sp->u.bsg_job;
|
||||
#endif
|
||||
int loop_iterartion = 0;
|
||||
int entry_count = 1;
|
||||
|
||||
memset(ct_iocb, 0, sizeof(ms_iocb_entry_t));
|
||||
@@ -3038,25 +3003,20 @@ qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb)
|
||||
ct_iocb->rsp_bytecount =
|
||||
cpu_to_le32(bsg_job->reply_payload.payload_len);
|
||||
|
||||
ct_iocb->dseg_req_address[0] = cpu_to_le32(LSD(sg_dma_address
|
||||
(bsg_job->request_payload.sg_list)));
|
||||
ct_iocb->dseg_req_address[1] = cpu_to_le32(MSD(sg_dma_address
|
||||
(bsg_job->request_payload.sg_list)));
|
||||
ct_iocb->dseg_req_length = ct_iocb->req_bytecount;
|
||||
put_unaligned_le64(sg_dma_address(bsg_job->request_payload.sg_list),
|
||||
&ct_iocb->req_dsd.address);
|
||||
ct_iocb->req_dsd.length = ct_iocb->req_bytecount;
|
||||
|
||||
ct_iocb->dseg_rsp_address[0] = cpu_to_le32(LSD(sg_dma_address
|
||||
(bsg_job->reply_payload.sg_list)));
|
||||
ct_iocb->dseg_rsp_address[1] = cpu_to_le32(MSD(sg_dma_address
|
||||
(bsg_job->reply_payload.sg_list)));
|
||||
ct_iocb->dseg_rsp_length = ct_iocb->rsp_bytecount;
|
||||
put_unaligned_le64(sg_dma_address(bsg_job->reply_payload.sg_list),
|
||||
&ct_iocb->rsp_dsd.address);
|
||||
ct_iocb->rsp_dsd.length = ct_iocb->rsp_bytecount;
|
||||
|
||||
avail_dsds = 1;
|
||||
cur_dsd = (uint32_t *)ct_iocb->dseg_rsp_address;
|
||||
cur_dsd = &ct_iocb->rsp_dsd;
|
||||
index = 0;
|
||||
tot_dsds = bsg_job->reply_payload.sg_cnt;
|
||||
|
||||
for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
|
||||
dma_addr_t sle_dma;
|
||||
cont_a64_entry_t *cont_pkt;
|
||||
|
||||
/* Allocate additional continuation packets? */
|
||||
@@ -3067,16 +3027,12 @@ qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb)
|
||||
*/
|
||||
cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
|
||||
vha->hw->req_q_map[0]);
|
||||
cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
|
||||
cur_dsd = cont_pkt->dsd;
|
||||
avail_dsds = 5;
|
||||
entry_count++;
|
||||
}
|
||||
|
||||
sle_dma = sg_dma_address(sg);
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
|
||||
loop_iterartion++;
|
||||
append_dsd64(&cur_dsd, sg);
|
||||
avail_dsds--;
|
||||
}
|
||||
ct_iocb->entry_count = entry_count;
|
||||
@@ -3088,7 +3044,7 @@ static void
|
||||
qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
|
||||
{
|
||||
uint16_t avail_dsds;
|
||||
uint32_t *cur_dsd;
|
||||
struct dsd64 *cur_dsd;
|
||||
struct scatterlist *sg;
|
||||
int index;
|
||||
uint16_t cmd_dsds, rsp_dsds;
|
||||
@@ -3121,12 +3077,10 @@ qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
|
||||
cpu_to_le32(bsg_job->request_payload.payload_len);
|
||||
|
||||
avail_dsds = 2;
|
||||
cur_dsd = (uint32_t *)ct_iocb->dseg_0_address;
|
||||
cur_dsd = ct_iocb->dsd;
|
||||
index = 0;
|
||||
|
||||
for_each_sg(bsg_job->request_payload.sg_list, sg, cmd_dsds, index) {
|
||||
dma_addr_t sle_dma;
|
||||
|
||||
/* Allocate additional continuation packets? */
|
||||
if (avail_dsds == 0) {
|
||||
/*
|
||||
@@ -3135,23 +3089,18 @@ qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
|
||||
*/
|
||||
cont_pkt = qla2x00_prep_cont_type1_iocb(
|
||||
vha, ha->req_q_map[0]);
|
||||
cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
|
||||
cur_dsd = cont_pkt->dsd;
|
||||
avail_dsds = 5;
|
||||
entry_count++;
|
||||
}
|
||||
|
||||
sle_dma = sg_dma_address(sg);
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
|
||||
append_dsd64(&cur_dsd, sg);
|
||||
avail_dsds--;
|
||||
}
|
||||
|
||||
index = 0;
|
||||
|
||||
for_each_sg(bsg_job->reply_payload.sg_list, sg, rsp_dsds, index) {
|
||||
dma_addr_t sle_dma;
|
||||
|
||||
/* Allocate additional continuation packets? */
|
||||
if (avail_dsds == 0) {
|
||||
/*
|
||||
@@ -3160,15 +3109,12 @@ qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
|
||||
*/
|
||||
cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
|
||||
ha->req_q_map[0]);
|
||||
cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
|
||||
cur_dsd = cont_pkt->dsd;
|
||||
avail_dsds = 5;
|
||||
entry_count++;
|
||||
}
|
||||
|
||||
sle_dma = sg_dma_address(sg);
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
|
||||
append_dsd64(&cur_dsd, sg);
|
||||
avail_dsds--;
|
||||
}
|
||||
ct_iocb->entry_count = entry_count;
|
||||
@@ -3389,10 +3335,8 @@ sufficient_dsds:
|
||||
*fcp_dl = htonl((uint32_t)scsi_bufflen(cmd));
|
||||
|
||||
cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(ctx->fcp_cmnd_len);
|
||||
cmd_pkt->fcp_cmnd_dseg_address[0] =
|
||||
cpu_to_le32(LSD(ctx->fcp_cmnd_dma));
|
||||
cmd_pkt->fcp_cmnd_dseg_address[1] =
|
||||
cpu_to_le32(MSD(ctx->fcp_cmnd_dma));
|
||||
put_unaligned_le64(ctx->fcp_cmnd_dma,
|
||||
&cmd_pkt->fcp_cmnd_dseg_address);
|
||||
|
||||
sp->flags |= SRB_FCP_CMND_DMA_VALID;
|
||||
cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
|
||||
@@ -3608,15 +3552,13 @@ qla_nvme_ls(srb_t *sp, struct pt_ls4_request *cmd_pkt)
|
||||
|
||||
cmd_pkt->tx_dseg_count = 1;
|
||||
cmd_pkt->tx_byte_count = nvme->u.nvme.cmd_len;
|
||||
cmd_pkt->dseg0_len = nvme->u.nvme.cmd_len;
|
||||
cmd_pkt->dseg0_address[0] = cpu_to_le32(LSD(nvme->u.nvme.cmd_dma));
|
||||
cmd_pkt->dseg0_address[1] = cpu_to_le32(MSD(nvme->u.nvme.cmd_dma));
|
||||
cmd_pkt->dsd[0].length = nvme->u.nvme.cmd_len;
|
||||
put_unaligned_le64(nvme->u.nvme.cmd_dma, &cmd_pkt->dsd[0].address);
|
||||
|
||||
cmd_pkt->rx_dseg_count = 1;
|
||||
cmd_pkt->rx_byte_count = nvme->u.nvme.rsp_len;
|
||||
cmd_pkt->dseg1_len = nvme->u.nvme.rsp_len;
|
||||
cmd_pkt->dseg1_address[0] = cpu_to_le32(LSD(nvme->u.nvme.rsp_dma));
|
||||
cmd_pkt->dseg1_address[1] = cpu_to_le32(MSD(nvme->u.nvme.rsp_dma));
|
||||
cmd_pkt->dsd[1].length = nvme->u.nvme.rsp_len;
|
||||
put_unaligned_le64(nvme->u.nvme.rsp_dma, &cmd_pkt->dsd[1].address);
|
||||
|
||||
return rval;
|
||||
}
|
||||
@@ -3755,7 +3697,7 @@ qla25xx_build_bidir_iocb(srb_t *sp, struct scsi_qla_host *vha,
|
||||
struct cmd_bidir *cmd_pkt, uint32_t tot_dsds)
|
||||
{
|
||||
uint16_t avail_dsds;
|
||||
uint32_t *cur_dsd;
|
||||
struct dsd64 *cur_dsd;
|
||||
uint32_t req_data_len = 0;
|
||||
uint32_t rsp_data_len = 0;
|
||||
struct scatterlist *sg;
|
||||
@@ -3794,13 +3736,12 @@ qla25xx_build_bidir_iocb(srb_t *sp, struct scsi_qla_host *vha,
|
||||
* are bundled in continuation iocb
|
||||
*/
|
||||
avail_dsds = 1;
|
||||
cur_dsd = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
|
||||
cur_dsd = &cmd_pkt->fcp_dsd;
|
||||
|
||||
index = 0;
|
||||
|
||||
for_each_sg(bsg_job->request_payload.sg_list, sg,
|
||||
bsg_job->request_payload.sg_cnt, index) {
|
||||
dma_addr_t sle_dma;
|
||||
cont_a64_entry_t *cont_pkt;
|
||||
|
||||
/* Allocate additional continuation packets */
|
||||
@@ -3809,14 +3750,11 @@ qla25xx_build_bidir_iocb(srb_t *sp, struct scsi_qla_host *vha,
|
||||
* 5 DSDS
|
||||
*/
|
||||
cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
|
||||
cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
|
||||
cur_dsd = cont_pkt->dsd;
|
||||
avail_dsds = 5;
|
||||
entry_count++;
|
||||
}
|
||||
sle_dma = sg_dma_address(sg);
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
|
||||
append_dsd64(&cur_dsd, sg);
|
||||
avail_dsds--;
|
||||
}
|
||||
/* For read request DSD will always goes to continuation IOCB
|
||||
@@ -3826,7 +3764,6 @@ qla25xx_build_bidir_iocb(srb_t *sp, struct scsi_qla_host *vha,
|
||||
*/
|
||||
for_each_sg(bsg_job->reply_payload.sg_list, sg,
|
||||
bsg_job->reply_payload.sg_cnt, index) {
|
||||
dma_addr_t sle_dma;
|
||||
cont_a64_entry_t *cont_pkt;
|
||||
|
||||
/* Allocate additional continuation packets */
|
||||
@@ -3835,14 +3772,11 @@ qla25xx_build_bidir_iocb(srb_t *sp, struct scsi_qla_host *vha,
|
||||
* 5 DSDS
|
||||
*/
|
||||
cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
|
||||
cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
|
||||
cur_dsd = cont_pkt->dsd;
|
||||
avail_dsds = 5;
|
||||
entry_count++;
|
||||
}
|
||||
sle_dma = sg_dma_address(sg);
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
|
||||
append_dsd64(&cur_dsd, sg);
|
||||
avail_dsds--;
|
||||
}
|
||||
/* This value should be same as number of IOCB required for this cmd */
|
||||
|
||||
@@ -35,6 +35,14 @@ static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
|
||||
static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
|
||||
sts_entry_t *);
|
||||
|
||||
const char *const port_state_str[] = {
|
||||
"Unknown",
|
||||
"UNCONFIGURED",
|
||||
"DEAD",
|
||||
"LOST",
|
||||
"ONLINE"
|
||||
};
|
||||
|
||||
/**
|
||||
* qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
|
||||
* @irq: interrupt number
|
||||
@@ -3605,7 +3613,8 @@ msix_failed:
|
||||
|
||||
/* Enable MSI-X vectors for the base queue */
|
||||
for (i = 0; i < QLA_BASE_VECTORS; i++) {
|
||||
WARN(i >= ha->msix_count, "%d > %d\n", i, ha->msix_count);
|
||||
if (WARN(i >= ha->msix_count, "%d > %d\n", i, ha->msix_count))
|
||||
break;
|
||||
qentry = &ha->msix_entries[i];
|
||||
qentry->handle = rsp;
|
||||
rsp->msix = qentry;
|
||||
|
||||
+18
-39
@@ -3006,7 +3006,7 @@ qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt,
|
||||
uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt)
|
||||
{
|
||||
uint16_t avail_dsds;
|
||||
__le32 *cur_dsd;
|
||||
struct dsd64 *cur_dsd;
|
||||
scsi_qla_host_t *vha;
|
||||
struct scsi_cmnd *cmd;
|
||||
struct scatterlist *sg;
|
||||
@@ -3042,12 +3042,10 @@ qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt,
|
||||
|
||||
/* One DSD is available in the Command Type 3 IOCB */
|
||||
avail_dsds = 1;
|
||||
cur_dsd = (__le32 *)&lcmd_pkt->dseg_0_address;
|
||||
cur_dsd = &lcmd_pkt->dsd;
|
||||
|
||||
/* Load data segments */
|
||||
scsi_for_each_sg(cmd, sg, tot_dsds, i) {
|
||||
dma_addr_t sle_dma;
|
||||
|
||||
/* Allocate additional continuation packets? */
|
||||
if (avail_dsds == 0) {
|
||||
/*
|
||||
@@ -3057,15 +3055,12 @@ qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt,
|
||||
memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE);
|
||||
cont_pkt =
|
||||
qlafx00_prep_cont_type1_iocb(req, &lcont_pkt);
|
||||
cur_dsd = (__le32 *)lcont_pkt.dseg_0_address;
|
||||
cur_dsd = lcont_pkt.dsd;
|
||||
avail_dsds = 5;
|
||||
cont = 1;
|
||||
}
|
||||
|
||||
sle_dma = sg_dma_address(sg);
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
|
||||
append_dsd64(&cur_dsd, sg);
|
||||
avail_dsds--;
|
||||
if (avail_dsds == 0 && cont == 1) {
|
||||
cont = 0;
|
||||
@@ -3300,11 +3295,9 @@ qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
|
||||
fx_iocb.req_dsdcnt = cpu_to_le16(1);
|
||||
fx_iocb.req_xfrcnt =
|
||||
cpu_to_le16(fxio->u.fxiocb.req_len);
|
||||
fx_iocb.dseg_rq_address[0] =
|
||||
cpu_to_le32(LSD(fxio->u.fxiocb.req_dma_handle));
|
||||
fx_iocb.dseg_rq_address[1] =
|
||||
cpu_to_le32(MSD(fxio->u.fxiocb.req_dma_handle));
|
||||
fx_iocb.dseg_rq_len =
|
||||
put_unaligned_le64(fxio->u.fxiocb.req_dma_handle,
|
||||
&fx_iocb.dseg_rq.address);
|
||||
fx_iocb.dseg_rq.length =
|
||||
cpu_to_le32(fxio->u.fxiocb.req_len);
|
||||
}
|
||||
|
||||
@@ -3312,11 +3305,9 @@ qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
|
||||
fx_iocb.rsp_dsdcnt = cpu_to_le16(1);
|
||||
fx_iocb.rsp_xfrcnt =
|
||||
cpu_to_le16(fxio->u.fxiocb.rsp_len);
|
||||
fx_iocb.dseg_rsp_address[0] =
|
||||
cpu_to_le32(LSD(fxio->u.fxiocb.rsp_dma_handle));
|
||||
fx_iocb.dseg_rsp_address[1] =
|
||||
cpu_to_le32(MSD(fxio->u.fxiocb.rsp_dma_handle));
|
||||
fx_iocb.dseg_rsp_len =
|
||||
put_unaligned_le64(fxio->u.fxiocb.rsp_dma_handle,
|
||||
&fx_iocb.dseg_rsp.address);
|
||||
fx_iocb.dseg_rsp.length =
|
||||
cpu_to_le32(fxio->u.fxiocb.rsp_len);
|
||||
}
|
||||
|
||||
@@ -3345,19 +3336,17 @@ qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
|
||||
int avail_dsds, tot_dsds;
|
||||
cont_a64_entry_t lcont_pkt;
|
||||
cont_a64_entry_t *cont_pkt = NULL;
|
||||
__le32 *cur_dsd;
|
||||
struct dsd64 *cur_dsd;
|
||||
int index = 0, cont = 0;
|
||||
|
||||
fx_iocb.req_dsdcnt =
|
||||
cpu_to_le16(bsg_job->request_payload.sg_cnt);
|
||||
tot_dsds =
|
||||
bsg_job->request_payload.sg_cnt;
|
||||
cur_dsd = (__le32 *)&fx_iocb.dseg_rq_address[0];
|
||||
cur_dsd = &fx_iocb.dseg_rq;
|
||||
avail_dsds = 1;
|
||||
for_each_sg(bsg_job->request_payload.sg_list, sg,
|
||||
tot_dsds, index) {
|
||||
dma_addr_t sle_dma;
|
||||
|
||||
/* Allocate additional continuation packets? */
|
||||
if (avail_dsds == 0) {
|
||||
/*
|
||||
@@ -3369,17 +3358,13 @@ qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
|
||||
cont_pkt =
|
||||
qlafx00_prep_cont_type1_iocb(
|
||||
sp->vha->req, &lcont_pkt);
|
||||
cur_dsd = (__le32 *)
|
||||
lcont_pkt.dseg_0_address;
|
||||
cur_dsd = lcont_pkt.dsd;
|
||||
avail_dsds = 5;
|
||||
cont = 1;
|
||||
entry_cnt++;
|
||||
}
|
||||
|
||||
sle_dma = sg_dma_address(sg);
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
|
||||
append_dsd64(&cur_dsd, sg);
|
||||
avail_dsds--;
|
||||
|
||||
if (avail_dsds == 0 && cont == 1) {
|
||||
@@ -3407,19 +3392,17 @@ qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
|
||||
int avail_dsds, tot_dsds;
|
||||
cont_a64_entry_t lcont_pkt;
|
||||
cont_a64_entry_t *cont_pkt = NULL;
|
||||
__le32 *cur_dsd;
|
||||
struct dsd64 *cur_dsd;
|
||||
int index = 0, cont = 0;
|
||||
|
||||
fx_iocb.rsp_dsdcnt =
|
||||
cpu_to_le16(bsg_job->reply_payload.sg_cnt);
|
||||
tot_dsds = bsg_job->reply_payload.sg_cnt;
|
||||
cur_dsd = (__le32 *)&fx_iocb.dseg_rsp_address[0];
|
||||
cur_dsd = &fx_iocb.dseg_rsp;
|
||||
avail_dsds = 1;
|
||||
|
||||
for_each_sg(bsg_job->reply_payload.sg_list, sg,
|
||||
tot_dsds, index) {
|
||||
dma_addr_t sle_dma;
|
||||
|
||||
/* Allocate additional continuation packets? */
|
||||
if (avail_dsds == 0) {
|
||||
/*
|
||||
@@ -3431,17 +3414,13 @@ qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
|
||||
cont_pkt =
|
||||
qlafx00_prep_cont_type1_iocb(
|
||||
sp->vha->req, &lcont_pkt);
|
||||
cur_dsd = (__le32 *)
|
||||
lcont_pkt.dseg_0_address;
|
||||
cur_dsd = lcont_pkt.dsd;
|
||||
avail_dsds = 5;
|
||||
cont = 1;
|
||||
entry_cnt++;
|
||||
}
|
||||
|
||||
sle_dma = sg_dma_address(sg);
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
|
||||
append_dsd64(&cur_dsd, sg);
|
||||
avail_dsds--;
|
||||
|
||||
if (avail_dsds == 0 && cont == 1) {
|
||||
|
||||
@@ -7,6 +7,8 @@
|
||||
#ifndef __QLA_MR_H
|
||||
#define __QLA_MR_H
|
||||
|
||||
#include "qla_dsd.h"
|
||||
|
||||
/*
|
||||
* The PCI VendorID and DeviceID for our board.
|
||||
*/
|
||||
@@ -46,8 +48,7 @@ struct cmd_type_7_fx00 {
|
||||
uint8_t fcp_cdb[MAX_CMDSZ]; /* SCSI command words. */
|
||||
__le32 byte_count; /* Total byte count. */
|
||||
|
||||
uint32_t dseg_0_address[2]; /* Data segment 0 address. */
|
||||
uint32_t dseg_0_len; /* Data segment 0 length. */
|
||||
struct dsd64 dsd;
|
||||
};
|
||||
|
||||
#define STATUS_TYPE_FX00 0x01 /* Status entry. */
|
||||
@@ -176,10 +177,8 @@ struct fxdisc_entry_fx00 {
|
||||
uint8_t flags;
|
||||
uint8_t reserved_1;
|
||||
|
||||
__le32 dseg_rq_address[2]; /* Data segment 0 address. */
|
||||
__le32 dseg_rq_len; /* Data segment 0 length. */
|
||||
__le32 dseg_rsp_address[2]; /* Data segment 1 address. */
|
||||
__le32 dseg_rsp_len; /* Data segment 1 length. */
|
||||
struct dsd64 dseg_rq;
|
||||
struct dsd64 dseg_rsp;
|
||||
|
||||
__le32 dataword;
|
||||
__le32 adapid;
|
||||
|
||||
+13
-25
@@ -142,7 +142,7 @@ static void qla_nvme_sp_ls_done(void *ptr, int res)
|
||||
struct nvmefc_ls_req *fd;
|
||||
struct nvme_private *priv;
|
||||
|
||||
if (WARN_ON(atomic_read(&sp->ref_count) == 0))
|
||||
if (WARN_ON_ONCE(atomic_read(&sp->ref_count) == 0))
|
||||
return;
|
||||
|
||||
atomic_dec(&sp->ref_count);
|
||||
@@ -168,7 +168,7 @@ static void qla_nvme_sp_done(void *ptr, int res)
|
||||
nvme = &sp->u.iocb_cmd;
|
||||
fd = nvme->u.nvme.desc;
|
||||
|
||||
if (WARN_ON(atomic_read(&sp->ref_count) == 0))
|
||||
if (WARN_ON_ONCE(atomic_read(&sp->ref_count) == 0))
|
||||
return;
|
||||
|
||||
atomic_dec(&sp->ref_count);
|
||||
@@ -195,10 +195,9 @@ static void qla_nvme_abort_work(struct work_struct *work)
|
||||
struct qla_hw_data *ha = fcport->vha->hw;
|
||||
int rval;
|
||||
|
||||
if (fcport)
|
||||
ql_dbg(ql_dbg_io, fcport->vha, 0xffff,
|
||||
"%s called for sp=%p, hndl=%x on fcport=%p deleted=%d\n",
|
||||
__func__, sp, sp->handle, fcport, fcport->deleted);
|
||||
ql_dbg(ql_dbg_io, fcport->vha, 0xffff,
|
||||
"%s called for sp=%p, hndl=%x on fcport=%p deleted=%d\n",
|
||||
__func__, sp, sp->handle, fcport, fcport->deleted);
|
||||
|
||||
if (!ha->flags.fw_started && (fcport && fcport->deleted))
|
||||
return;
|
||||
@@ -211,13 +210,8 @@ static void qla_nvme_abort_work(struct work_struct *work)
|
||||
return;
|
||||
}
|
||||
|
||||
if (atomic_read(&sp->ref_count) == 0) {
|
||||
WARN_ON(1);
|
||||
ql_log(ql_log_info, fcport->vha, 0xffff,
|
||||
"%s: command already aborted on sp: %p\n",
|
||||
__func__, sp);
|
||||
if (WARN_ON_ONCE(atomic_read(&sp->ref_count) == 0))
|
||||
return;
|
||||
}
|
||||
|
||||
rval = ha->isp_ops->abort_command(sp);
|
||||
|
||||
@@ -317,7 +311,7 @@ static inline int qla2x00_start_nvme_mq(srb_t *sp)
|
||||
uint16_t req_cnt;
|
||||
uint16_t tot_dsds;
|
||||
uint16_t avail_dsds;
|
||||
uint32_t *cur_dsd;
|
||||
struct dsd64 *cur_dsd;
|
||||
struct req_que *req = NULL;
|
||||
struct scsi_qla_host *vha = sp->fcport->vha;
|
||||
struct qla_hw_data *ha = vha->hw;
|
||||
@@ -421,25 +415,22 @@ static inline int qla2x00_start_nvme_mq(srb_t *sp)
|
||||
|
||||
/* NVME RSP IU */
|
||||
cmd_pkt->nvme_rsp_dsd_len = cpu_to_le16(fd->rsplen);
|
||||
cmd_pkt->nvme_rsp_dseg_address[0] = cpu_to_le32(LSD(fd->rspdma));
|
||||
cmd_pkt->nvme_rsp_dseg_address[1] = cpu_to_le32(MSD(fd->rspdma));
|
||||
put_unaligned_le64(fd->rspdma, &cmd_pkt->nvme_rsp_dseg_address);
|
||||
|
||||
/* NVME CNMD IU */
|
||||
cmd_pkt->nvme_cmnd_dseg_len = cpu_to_le16(fd->cmdlen);
|
||||
cmd_pkt->nvme_cmnd_dseg_address[0] = cpu_to_le32(LSD(fd->cmddma));
|
||||
cmd_pkt->nvme_cmnd_dseg_address[1] = cpu_to_le32(MSD(fd->cmddma));
|
||||
cmd_pkt->nvme_cmnd_dseg_address = cpu_to_le64(fd->cmddma);
|
||||
|
||||
cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
|
||||
cmd_pkt->byte_count = cpu_to_le32(fd->payload_length);
|
||||
|
||||
/* One DSD is available in the Command Type NVME IOCB */
|
||||
avail_dsds = 1;
|
||||
cur_dsd = (uint32_t *)&cmd_pkt->nvme_data_dseg_address[0];
|
||||
cur_dsd = &cmd_pkt->nvme_dsd;
|
||||
sgl = fd->first_sgl;
|
||||
|
||||
/* Load data segments */
|
||||
for_each_sg(sgl, sg, tot_dsds, i) {
|
||||
dma_addr_t sle_dma;
|
||||
cont_a64_entry_t *cont_pkt;
|
||||
|
||||
/* Allocate additional continuation packets? */
|
||||
@@ -461,14 +452,11 @@ static inline int qla2x00_start_nvme_mq(srb_t *sp)
|
||||
put_unaligned_le32(CONTINUE_A64_TYPE,
|
||||
&cont_pkt->entry_type);
|
||||
|
||||
cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
|
||||
avail_dsds = 5;
|
||||
cur_dsd = cont_pkt->dsd;
|
||||
avail_dsds = ARRAY_SIZE(cont_pkt->dsd);
|
||||
}
|
||||
|
||||
sle_dma = sg_dma_address(sg);
|
||||
*cur_dsd++ = cpu_to_le32(LSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(MSD(sle_dma));
|
||||
*cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
|
||||
append_dsd64(&cur_dsd, sg);
|
||||
avail_dsds--;
|
||||
}
|
||||
|
||||
|
||||
@@ -14,6 +14,7 @@
|
||||
#endif
|
||||
|
||||
#include "qla_def.h"
|
||||
#include "qla_dsd.h"
|
||||
|
||||
/* default dev loss time (seconds) before transport tears down ctrl */
|
||||
#define NVME_FC_DEV_LOSS_TMO 30
|
||||
@@ -65,16 +66,15 @@ struct cmd_nvme {
|
||||
#define CF_WRITE_DATA BIT_0
|
||||
|
||||
uint16_t nvme_cmnd_dseg_len; /* Data segment length. */
|
||||
uint32_t nvme_cmnd_dseg_address[2]; /* Data segment address. */
|
||||
uint32_t nvme_rsp_dseg_address[2]; /* Data segment address. */
|
||||
__le64 nvme_cmnd_dseg_address __packed;/* Data segment address. */
|
||||
__le64 nvme_rsp_dseg_address __packed; /* Data segment address. */
|
||||
|
||||
uint32_t byte_count; /* Total byte count. */
|
||||
|
||||
uint8_t port_id[3]; /* PortID of destination port. */
|
||||
uint8_t vp_index;
|
||||
|
||||
uint32_t nvme_data_dseg_address[2]; /* Data segment address. */
|
||||
uint32_t nvme_data_dseg_len; /* Data segment length. */
|
||||
struct dsd64 nvme_dsd;
|
||||
};
|
||||
|
||||
#define PT_LS4_REQUEST 0x89 /* Link Service pass-through IOCB (request) */
|
||||
@@ -102,10 +102,7 @@ struct pt_ls4_request {
|
||||
uint32_t rsvd3;
|
||||
uint32_t rx_byte_count;
|
||||
uint32_t tx_byte_count;
|
||||
uint32_t dseg0_address[2];
|
||||
uint32_t dseg0_len;
|
||||
uint32_t dseg1_address[2];
|
||||
uint32_t dseg1_len;
|
||||
struct dsd64 dsd[2];
|
||||
};
|
||||
|
||||
#define PT_LS4_UNSOL 0x56 /* pass-up unsolicited rec FC-NVMe request */
|
||||
|
||||
@@ -1780,10 +1780,8 @@ void qla82xx_config_rings(struct scsi_qla_host *vha)
|
||||
icb->response_q_inpointer = cpu_to_le16(0);
|
||||
icb->request_q_length = cpu_to_le16(req->length);
|
||||
icb->response_q_length = cpu_to_le16(rsp->length);
|
||||
icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
|
||||
icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
|
||||
icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
|
||||
icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
|
||||
put_unaligned_le64(req->dma, &icb->request_q_address);
|
||||
put_unaligned_le64(rsp->dma, &icb->response_q_address);
|
||||
|
||||
WRT_REG_DWORD(®->req_q_out[0], 0);
|
||||
WRT_REG_DWORD(®->rsp_q_in[0], 0);
|
||||
@@ -2030,7 +2028,7 @@ qla82xx_intr_handler(int irq, void *dev_id)
|
||||
unsigned long flags;
|
||||
unsigned long iter;
|
||||
uint32_t stat = 0;
|
||||
uint16_t mb[4];
|
||||
uint16_t mb[8];
|
||||
|
||||
rsp = (struct rsp_que *) dev_id;
|
||||
if (!rsp) {
|
||||
@@ -2114,7 +2112,7 @@ qla82xx_msix_default(int irq, void *dev_id)
|
||||
unsigned long flags;
|
||||
uint32_t stat = 0;
|
||||
uint32_t host_int = 0;
|
||||
uint16_t mb[4];
|
||||
uint16_t mb[8];
|
||||
|
||||
rsp = (struct rsp_que *) dev_id;
|
||||
if (!rsp) {
|
||||
@@ -2210,7 +2208,7 @@ qla82xx_poll(int irq, void *dev_id)
|
||||
int status = 0;
|
||||
uint32_t stat;
|
||||
uint32_t host_int = 0;
|
||||
uint16_t mb[4];
|
||||
uint16_t mb[8];
|
||||
unsigned long flags;
|
||||
|
||||
rsp = (struct rsp_que *) dev_id;
|
||||
|
||||
@@ -3896,7 +3896,7 @@ qla8044_intr_handler(int irq, void *dev_id)
|
||||
unsigned long flags;
|
||||
unsigned long iter;
|
||||
uint32_t stat;
|
||||
uint16_t mb[4];
|
||||
uint16_t mb[8];
|
||||
uint32_t leg_int_ptr = 0, pf_bit;
|
||||
|
||||
rsp = (struct rsp_que *) dev_id;
|
||||
|
||||
+93
-57
@@ -846,25 +846,8 @@ qla2xxx_qpair_sp_free_dma(void *ptr)
|
||||
sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
|
||||
}
|
||||
|
||||
if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
|
||||
struct crc_context *ctx0 = ctx;
|
||||
|
||||
dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
|
||||
sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
|
||||
}
|
||||
|
||||
if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
|
||||
struct ct6_dsd *ctx1 = ctx;
|
||||
dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
|
||||
ctx1->fcp_cmnd_dma);
|
||||
list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
|
||||
ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
|
||||
ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
|
||||
mempool_free(ctx1, ha->ctx_mempool);
|
||||
sp->flags &= ~SRB_FCP_CMND_DMA_VALID;
|
||||
}
|
||||
if (sp->flags & SRB_DIF_BUNDL_DMA_VALID) {
|
||||
struct crc_context *difctx = sp->u.scmd.ctx;
|
||||
struct crc_context *difctx = ctx;
|
||||
struct dsd_dma *dif_dsd, *nxt_dsd;
|
||||
|
||||
list_for_each_entry_safe(dif_dsd, nxt_dsd,
|
||||
@@ -899,6 +882,25 @@ qla2xxx_qpair_sp_free_dma(void *ptr)
|
||||
sp->flags &= ~SRB_DIF_BUNDL_DMA_VALID;
|
||||
}
|
||||
|
||||
if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
|
||||
struct ct6_dsd *ctx1 = ctx;
|
||||
|
||||
dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
|
||||
ctx1->fcp_cmnd_dma);
|
||||
list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
|
||||
ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
|
||||
ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
|
||||
mempool_free(ctx1, ha->ctx_mempool);
|
||||
sp->flags &= ~SRB_FCP_CMND_DMA_VALID;
|
||||
}
|
||||
|
||||
if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
|
||||
struct crc_context *ctx0 = ctx;
|
||||
|
||||
dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
|
||||
sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
|
||||
}
|
||||
|
||||
end:
|
||||
CMD_SP(cmd) = NULL;
|
||||
qla2xxx_rel_qpair_sp(sp->qpair, sp);
|
||||
@@ -948,7 +950,8 @@ qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
|
||||
srb_t *sp;
|
||||
int rval;
|
||||
|
||||
if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
|
||||
if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)) ||
|
||||
WARN_ON_ONCE(!rport)) {
|
||||
cmd->result = DID_NO_CONNECT << 16;
|
||||
goto qc24_fail_command;
|
||||
}
|
||||
@@ -1077,7 +1080,7 @@ qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
|
||||
srb_t *sp;
|
||||
int rval;
|
||||
|
||||
rval = fc_remote_port_chkready(rport);
|
||||
rval = rport ? fc_remote_port_chkready(rport) : FC_PORTSTATE_OFFLINE;
|
||||
if (rval) {
|
||||
cmd->result = rval;
|
||||
ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
|
||||
@@ -4064,6 +4067,19 @@ qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
|
||||
}
|
||||
}
|
||||
|
||||
static void qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (IS_FWI2_CAPABLE(ha))
|
||||
return;
|
||||
|
||||
for (i = 0; i < SNS_FIRST_LOOP_ID; i++)
|
||||
set_bit(i, ha->loop_id_map);
|
||||
set_bit(MANAGEMENT_SERVER, ha->loop_id_map);
|
||||
set_bit(BROADCAST, ha->loop_id_map);
|
||||
}
|
||||
|
||||
/*
|
||||
* qla2x00_mem_alloc
|
||||
* Allocates adapter memory.
|
||||
@@ -4746,48 +4762,68 @@ qla2x00_mem_free(struct qla_hw_data *ha)
|
||||
if (ha->mctp_dump)
|
||||
dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
|
||||
ha->mctp_dump_dma);
|
||||
ha->mctp_dump = NULL;
|
||||
|
||||
mempool_destroy(ha->srb_mempool);
|
||||
ha->srb_mempool = NULL;
|
||||
|
||||
if (ha->dcbx_tlv)
|
||||
dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
|
||||
ha->dcbx_tlv, ha->dcbx_tlv_dma);
|
||||
ha->dcbx_tlv = NULL;
|
||||
|
||||
if (ha->xgmac_data)
|
||||
dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
|
||||
ha->xgmac_data, ha->xgmac_data_dma);
|
||||
ha->xgmac_data = NULL;
|
||||
|
||||
if (ha->sns_cmd)
|
||||
dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
|
||||
ha->sns_cmd, ha->sns_cmd_dma);
|
||||
ha->sns_cmd = NULL;
|
||||
ha->sns_cmd_dma = 0;
|
||||
|
||||
if (ha->ct_sns)
|
||||
dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
|
||||
ha->ct_sns, ha->ct_sns_dma);
|
||||
ha->ct_sns = NULL;
|
||||
ha->ct_sns_dma = 0;
|
||||
|
||||
if (ha->sfp_data)
|
||||
dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
|
||||
ha->sfp_data_dma);
|
||||
ha->sfp_data = NULL;
|
||||
|
||||
if (ha->flt)
|
||||
dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
|
||||
ha->flt, ha->flt_dma);
|
||||
ha->flt = NULL;
|
||||
ha->flt_dma = 0;
|
||||
|
||||
if (ha->ms_iocb)
|
||||
dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
|
||||
ha->ms_iocb = NULL;
|
||||
ha->ms_iocb_dma = 0;
|
||||
|
||||
if (ha->ex_init_cb)
|
||||
dma_pool_free(ha->s_dma_pool,
|
||||
ha->ex_init_cb, ha->ex_init_cb_dma);
|
||||
ha->ex_init_cb = NULL;
|
||||
ha->ex_init_cb_dma = 0;
|
||||
|
||||
if (ha->async_pd)
|
||||
dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
|
||||
ha->async_pd = NULL;
|
||||
ha->async_pd_dma = 0;
|
||||
|
||||
dma_pool_destroy(ha->s_dma_pool);
|
||||
ha->s_dma_pool = NULL;
|
||||
|
||||
if (ha->gid_list)
|
||||
dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
|
||||
ha->gid_list, ha->gid_list_dma);
|
||||
ha->gid_list = NULL;
|
||||
ha->gid_list_dma = 0;
|
||||
|
||||
if (IS_QLA82XX(ha)) {
|
||||
if (!list_empty(&ha->gbl_dsd_list)) {
|
||||
@@ -4805,10 +4841,13 @@ qla2x00_mem_free(struct qla_hw_data *ha)
|
||||
}
|
||||
|
||||
dma_pool_destroy(ha->dl_dma_pool);
|
||||
ha->dl_dma_pool = NULL;
|
||||
|
||||
dma_pool_destroy(ha->fcp_cmnd_dma_pool);
|
||||
ha->fcp_cmnd_dma_pool = NULL;
|
||||
|
||||
mempool_destroy(ha->ctx_mempool);
|
||||
ha->ctx_mempool = NULL;
|
||||
|
||||
if (ql2xenabledif) {
|
||||
struct dsd_dma *dsd, *nxt;
|
||||
@@ -4835,53 +4874,26 @@ qla2x00_mem_free(struct qla_hw_data *ha)
|
||||
|
||||
if (ha->dif_bundl_pool)
|
||||
dma_pool_destroy(ha->dif_bundl_pool);
|
||||
ha->dif_bundl_pool = NULL;
|
||||
|
||||
qlt_mem_free(ha);
|
||||
|
||||
if (ha->init_cb)
|
||||
dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
|
||||
ha->init_cb, ha->init_cb_dma);
|
||||
|
||||
vfree(ha->optrom_buffer);
|
||||
kfree(ha->nvram);
|
||||
kfree(ha->npiv_info);
|
||||
kfree(ha->swl);
|
||||
kfree(ha->loop_id_map);
|
||||
|
||||
ha->srb_mempool = NULL;
|
||||
ha->ctx_mempool = NULL;
|
||||
ha->sns_cmd = NULL;
|
||||
ha->sns_cmd_dma = 0;
|
||||
ha->ct_sns = NULL;
|
||||
ha->ct_sns_dma = 0;
|
||||
ha->ms_iocb = NULL;
|
||||
ha->ms_iocb_dma = 0;
|
||||
ha->init_cb = NULL;
|
||||
ha->init_cb_dma = 0;
|
||||
ha->ex_init_cb = NULL;
|
||||
ha->ex_init_cb_dma = 0;
|
||||
ha->async_pd = NULL;
|
||||
ha->async_pd_dma = 0;
|
||||
ha->loop_id_map = NULL;
|
||||
ha->npiv_info = NULL;
|
||||
|
||||
vfree(ha->optrom_buffer);
|
||||
ha->optrom_buffer = NULL;
|
||||
ha->swl = NULL;
|
||||
kfree(ha->nvram);
|
||||
ha->nvram = NULL;
|
||||
ha->mctp_dump = NULL;
|
||||
ha->dcbx_tlv = NULL;
|
||||
ha->xgmac_data = NULL;
|
||||
ha->sfp_data = NULL;
|
||||
|
||||
ha->s_dma_pool = NULL;
|
||||
ha->dl_dma_pool = NULL;
|
||||
ha->fcp_cmnd_dma_pool = NULL;
|
||||
|
||||
ha->gid_list = NULL;
|
||||
ha->gid_list_dma = 0;
|
||||
|
||||
ha->tgt.atio_ring = NULL;
|
||||
ha->tgt.atio_dma = 0;
|
||||
ha->tgt.tgt_vp_map = NULL;
|
||||
kfree(ha->npiv_info);
|
||||
ha->npiv_info = NULL;
|
||||
kfree(ha->swl);
|
||||
ha->swl = NULL;
|
||||
kfree(ha->loop_id_map);
|
||||
ha->loop_id_map = NULL;
|
||||
}
|
||||
|
||||
struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
|
||||
@@ -7427,6 +7439,30 @@ qla2x00_module_init(void)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
BUILD_BUG_ON(sizeof(cmd_entry_t) != 64);
|
||||
BUILD_BUG_ON(sizeof(cont_a64_entry_t) != 64);
|
||||
BUILD_BUG_ON(sizeof(cont_entry_t) != 64);
|
||||
BUILD_BUG_ON(sizeof(init_cb_t) != 96);
|
||||
BUILD_BUG_ON(sizeof(ms_iocb_entry_t) != 64);
|
||||
BUILD_BUG_ON(sizeof(request_t) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct access_chip_84xx) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct cmd_bidir) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct cmd_nvme) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct cmd_type_6) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct cmd_type_7) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct cmd_type_7_fx00) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct cmd_type_crc_2) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct ct_entry_24xx) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct ctio_crc2_to_fw) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct els_entry_24xx) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct fxdisc_entry_fx00) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct init_cb_24xx) != 128);
|
||||
BUILD_BUG_ON(sizeof(struct init_cb_81xx) != 128);
|
||||
BUILD_BUG_ON(sizeof(struct pt_ls4_request) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct sns_cmd_pkt) != 2064);
|
||||
BUILD_BUG_ON(sizeof(struct verify_chip_entry_84xx) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct vf_evfp_entry_24xx) != 56);
|
||||
|
||||
/* Allocate cache for SRBs. */
|
||||
srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
|
||||
SLAB_HWCACHE_ALIGN, NULL);
|
||||
|
||||
@@ -2343,14 +2343,14 @@ void qlt_send_resp_ctio(struct qla_qpair *qpair, struct qla_tgt_cmd *cmd,
|
||||
ctio->u.status1.scsi_status |=
|
||||
cpu_to_le16(SS_RESIDUAL_UNDER);
|
||||
|
||||
/* Response code and sense key */
|
||||
put_unaligned_le32(((0x70 << 24) | (sense_key << 8)),
|
||||
(&ctio->u.status1.sense_data)[0]);
|
||||
/* Fixed format sense data. */
|
||||
ctio->u.status1.sense_data[0] = 0x70;
|
||||
ctio->u.status1.sense_data[2] = sense_key;
|
||||
/* Additional sense length */
|
||||
put_unaligned_le32(0x0a, (&ctio->u.status1.sense_data)[1]);
|
||||
ctio->u.status1.sense_data[7] = 0xa;
|
||||
/* ASC and ASCQ */
|
||||
put_unaligned_le32(((asc << 24) | (ascq << 16)),
|
||||
(&ctio->u.status1.sense_data)[3]);
|
||||
ctio->u.status1.sense_data[12] = asc;
|
||||
ctio->u.status1.sense_data[13] = ascq;
|
||||
|
||||
/* Memory Barrier */
|
||||
wmb();
|
||||
@@ -2654,7 +2654,7 @@ static int qlt_24xx_build_ctio_pkt(struct qla_qpair *qpair,
|
||||
static void qlt_load_cont_data_segments(struct qla_tgt_prm *prm)
|
||||
{
|
||||
int cnt;
|
||||
uint32_t *dword_ptr;
|
||||
struct dsd64 *cur_dsd;
|
||||
|
||||
/* Build continuation packets */
|
||||
while (prm->seg_cnt > 0) {
|
||||
@@ -2675,19 +2675,13 @@ static void qlt_load_cont_data_segments(struct qla_tgt_prm *prm)
|
||||
cont_pkt64->sys_define = 0;
|
||||
|
||||
cont_pkt64->entry_type = CONTINUE_A64_TYPE;
|
||||
dword_ptr = (uint32_t *)&cont_pkt64->dseg_0_address;
|
||||
cur_dsd = cont_pkt64->dsd;
|
||||
|
||||
/* Load continuation entry data segments */
|
||||
for (cnt = 0;
|
||||
cnt < QLA_TGT_DATASEGS_PER_CONT_24XX && prm->seg_cnt;
|
||||
cnt++, prm->seg_cnt--) {
|
||||
*dword_ptr++ =
|
||||
cpu_to_le32(lower_32_bits
|
||||
(sg_dma_address(prm->sg)));
|
||||
*dword_ptr++ = cpu_to_le32(upper_32_bits
|
||||
(sg_dma_address(prm->sg)));
|
||||
*dword_ptr++ = cpu_to_le32(sg_dma_len(prm->sg));
|
||||
|
||||
append_dsd64(&cur_dsd, prm->sg);
|
||||
prm->sg = sg_next(prm->sg);
|
||||
}
|
||||
}
|
||||
@@ -2700,13 +2694,13 @@ static void qlt_load_cont_data_segments(struct qla_tgt_prm *prm)
|
||||
static void qlt_load_data_segments(struct qla_tgt_prm *prm)
|
||||
{
|
||||
int cnt;
|
||||
uint32_t *dword_ptr;
|
||||
struct dsd64 *cur_dsd;
|
||||
struct ctio7_to_24xx *pkt24 = (struct ctio7_to_24xx *)prm->pkt;
|
||||
|
||||
pkt24->u.status0.transfer_length = cpu_to_le32(prm->cmd->bufflen);
|
||||
|
||||
/* Setup packet address segment pointer */
|
||||
dword_ptr = pkt24->u.status0.dseg_0_address;
|
||||
cur_dsd = &pkt24->u.status0.dsd;
|
||||
|
||||
/* Set total data segment count */
|
||||
if (prm->seg_cnt)
|
||||
@@ -2714,8 +2708,8 @@ static void qlt_load_data_segments(struct qla_tgt_prm *prm)
|
||||
|
||||
if (prm->seg_cnt == 0) {
|
||||
/* No data transfer */
|
||||
*dword_ptr++ = 0;
|
||||
*dword_ptr = 0;
|
||||
cur_dsd->address = 0;
|
||||
cur_dsd->length = 0;
|
||||
return;
|
||||
}
|
||||
|
||||
@@ -2725,14 +2719,7 @@ static void qlt_load_data_segments(struct qla_tgt_prm *prm)
|
||||
for (cnt = 0;
|
||||
(cnt < QLA_TGT_DATASEGS_PER_CMD_24XX) && prm->seg_cnt;
|
||||
cnt++, prm->seg_cnt--) {
|
||||
*dword_ptr++ =
|
||||
cpu_to_le32(lower_32_bits(sg_dma_address(prm->sg)));
|
||||
|
||||
*dword_ptr++ = cpu_to_le32(upper_32_bits(
|
||||
sg_dma_address(prm->sg)));
|
||||
|
||||
*dword_ptr++ = cpu_to_le32(sg_dma_len(prm->sg));
|
||||
|
||||
append_dsd64(&cur_dsd, prm->sg);
|
||||
prm->sg = sg_next(prm->sg);
|
||||
}
|
||||
|
||||
@@ -3057,7 +3044,7 @@ qla_tgt_set_dif_tags(struct qla_tgt_cmd *cmd, struct crc_context *ctx,
|
||||
static inline int
|
||||
qlt_build_ctio_crc2_pkt(struct qla_qpair *qpair, struct qla_tgt_prm *prm)
|
||||
{
|
||||
uint32_t *cur_dsd;
|
||||
struct dsd64 *cur_dsd;
|
||||
uint32_t transfer_length = 0;
|
||||
uint32_t data_bytes;
|
||||
uint32_t dif_bytes;
|
||||
@@ -3203,12 +3190,11 @@ qlt_build_ctio_crc2_pkt(struct qla_qpair *qpair, struct qla_tgt_prm *prm)
|
||||
|
||||
qla_tgt_set_dif_tags(cmd, crc_ctx_pkt, &fw_prot_opts);
|
||||
|
||||
pkt->crc_context_address[0] = cpu_to_le32(LSD(crc_ctx_dma));
|
||||
pkt->crc_context_address[1] = cpu_to_le32(MSD(crc_ctx_dma));
|
||||
put_unaligned_le64(crc_ctx_dma, &pkt->crc_context_address);
|
||||
pkt->crc_context_len = CRC_CONTEXT_LEN_FW;
|
||||
|
||||
if (!bundling) {
|
||||
cur_dsd = (uint32_t *) &crc_ctx_pkt->u.nobundling.data_address;
|
||||
cur_dsd = &crc_ctx_pkt->u.nobundling.data_dsd;
|
||||
} else {
|
||||
/*
|
||||
* Configure Bundling if we need to fetch interlaving
|
||||
@@ -3218,7 +3204,7 @@ qlt_build_ctio_crc2_pkt(struct qla_qpair *qpair, struct qla_tgt_prm *prm)
|
||||
crc_ctx_pkt->u.bundling.dif_byte_count = cpu_to_le32(dif_bytes);
|
||||
crc_ctx_pkt->u.bundling.dseg_count =
|
||||
cpu_to_le16(prm->tot_dsds - prm->prot_seg_cnt);
|
||||
cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.data_address;
|
||||
cur_dsd = &crc_ctx_pkt->u.bundling.data_dsd;
|
||||
}
|
||||
|
||||
/* Finish the common fields of CRC pkt */
|
||||
@@ -3251,7 +3237,7 @@ qlt_build_ctio_crc2_pkt(struct qla_qpair *qpair, struct qla_tgt_prm *prm)
|
||||
/* Walks dif segments */
|
||||
pkt->add_flags |= CTIO_CRC2_AF_DIF_DSD_ENA;
|
||||
|
||||
cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.dif_address;
|
||||
cur_dsd = &crc_ctx_pkt->u.bundling.dif_dsd;
|
||||
if (qla24xx_walk_and_build_prot_sglist(ha, NULL, cur_dsd,
|
||||
prm->prot_seg_cnt, cmd))
|
||||
goto crc_queuing_error;
|
||||
@@ -3684,33 +3670,11 @@ static int __qlt_send_term_imm_notif(struct scsi_qla_host *vha,
|
||||
static void qlt_send_term_imm_notif(struct scsi_qla_host *vha,
|
||||
struct imm_ntfy_from_isp *imm, int ha_locked)
|
||||
{
|
||||
unsigned long flags = 0;
|
||||
int rc;
|
||||
|
||||
if (ha_locked) {
|
||||
rc = __qlt_send_term_imm_notif(vha, imm);
|
||||
|
||||
#if 0 /* Todo */
|
||||
if (rc == -ENOMEM)
|
||||
qlt_alloc_qfull_cmd(vha, imm, 0, 0);
|
||||
#else
|
||||
if (rc) {
|
||||
}
|
||||
#endif
|
||||
goto done;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&vha->hw->hardware_lock, flags);
|
||||
WARN_ON_ONCE(!ha_locked);
|
||||
rc = __qlt_send_term_imm_notif(vha, imm);
|
||||
|
||||
#if 0 /* Todo */
|
||||
if (rc == -ENOMEM)
|
||||
qlt_alloc_qfull_cmd(vha, imm, 0, 0);
|
||||
#endif
|
||||
|
||||
done:
|
||||
if (!ha_locked)
|
||||
spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
|
||||
pr_debug("rc = %d\n", rc);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -4280,7 +4244,7 @@ static void __qlt_do_work(struct qla_tgt_cmd *cmd)
|
||||
if (ret != 0)
|
||||
goto out_term;
|
||||
/*
|
||||
* Drop extra session reference from qla_tgt_handle_cmd_for_atio*(
|
||||
* Drop extra session reference from qlt_handle_cmd_for_atio().
|
||||
*/
|
||||
ha->tgt.tgt_ops->put_sess(sess);
|
||||
return;
|
||||
@@ -7378,7 +7342,10 @@ qlt_mem_free(struct qla_hw_data *ha)
|
||||
sizeof(struct atio_from_isp), ha->tgt.atio_ring,
|
||||
ha->tgt.atio_dma);
|
||||
}
|
||||
ha->tgt.atio_ring = NULL;
|
||||
ha->tgt.atio_dma = 0;
|
||||
kfree(ha->tgt.tgt_vp_map);
|
||||
ha->tgt.tgt_vp_map = NULL;
|
||||
}
|
||||
|
||||
/* vport_slock to be held by the caller */
|
||||
@@ -7462,6 +7429,9 @@ int __init qlt_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
BUILD_BUG_ON(sizeof(struct ctio7_to_24xx) != 64);
|
||||
BUILD_BUG_ON(sizeof(struct ctio_to_2xxx) != 64);
|
||||
|
||||
if (!qlt_parse_ini_mode()) {
|
||||
ql_log(ql_log_fatal, NULL, 0xe06b,
|
||||
"qlt_parse_ini_mode() failed\n");
|
||||
|
||||
@@ -31,6 +31,7 @@
|
||||
#include <linux/version.h>
|
||||
#include <asm/unaligned.h>
|
||||
#include "qla_def.h"
|
||||
#include "qla_dsd.h"
|
||||
|
||||
/* See also commit ce65e5b97b19 ("target: Add DIF related base definitions") # v3.14. */
|
||||
#if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0) || \
|
||||
@@ -251,12 +252,7 @@ struct ctio_to_2xxx {
|
||||
uint16_t reserved_1[3];
|
||||
uint16_t scsi_status;
|
||||
uint32_t transfer_length;
|
||||
uint32_t dseg_0_address; /* Data segment 0 address. */
|
||||
uint32_t dseg_0_length; /* Data segment 0 length. */
|
||||
uint32_t dseg_1_address; /* Data segment 1 address. */
|
||||
uint32_t dseg_1_length; /* Data segment 1 length. */
|
||||
uint32_t dseg_2_address; /* Data segment 2 address. */
|
||||
uint32_t dseg_2_length; /* Data segment 2 length. */
|
||||
struct dsd32 dsd[3];
|
||||
} __packed;
|
||||
#define ATIO_PATH_INVALID 0x07
|
||||
#define ATIO_CANT_PROV_CAP 0x16
|
||||
@@ -456,10 +452,7 @@ struct ctio7_to_24xx {
|
||||
uint32_t reserved2;
|
||||
uint32_t transfer_length;
|
||||
uint32_t reserved3;
|
||||
/* Data segment 0 address. */
|
||||
uint32_t dseg_0_address[2];
|
||||
/* Data segment 0 length. */
|
||||
uint32_t dseg_0_length;
|
||||
struct dsd64 dsd;
|
||||
} status0;
|
||||
struct {
|
||||
uint16_t sense_length;
|
||||
@@ -553,10 +546,10 @@ struct ctio_crc2_to_fw {
|
||||
uint32_t reserved5;
|
||||
__le32 transfer_length; /* total fc transfer length */
|
||||
uint32_t reserved6;
|
||||
__le32 crc_context_address[2];/* Data segment address. */
|
||||
__le64 crc_context_address __packed; /* Data segment address. */
|
||||
uint16_t crc_context_len; /* Data segment length. */
|
||||
uint16_t reserved_1; /* MUST be set to 0. */
|
||||
} __packed;
|
||||
};
|
||||
|
||||
/* CTIO Type CRC_x Status IOCB */
|
||||
struct ctio_crc_from_fw {
|
||||
|
||||
Reference in New Issue
Block a user