mirror of
https://github.com/SCST-project/scst.git
synced 2026-07-26 18:12:42 +00:00
Merge branch 'svn-trunk'
This commit is contained in:
@@ -338,7 +338,7 @@ int kernel_params_set(u32 tid, u64 sid, int type, u32 partial,
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if ((err = ioctl(ctrl_fd, ISCSI_PARAM_SET, &info)) < 0) {
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err = -errno;
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log_error("Can't set session params for session 0x%" PRIx64
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log_error("Can't set session params for session 0x%" PRIx64
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" (tid %u, type %d, partial %d, err %d): %s\n", sid,
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tid, type, partial, err, strerror(errno));
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}
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@@ -50,7 +50,7 @@ static inline int list_length_is_one(const struct __qelem *head)
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#define container_of(ptr, type, member) ({ \
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const typeof( ((type *)0)->member ) *__mptr = (ptr); \
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(type *)( (char *)__mptr - offsetof(type,member) );})
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(type *)((char *)__mptr - offsetof(type, member)); })
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#define list_entry(ptr, type, member) \
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container_of(ptr, type, member)
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@@ -355,7 +355,8 @@ int target_del(u32 tid, u32 cookie)
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while (1) {
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/* We might need to handle session(s) removal event(s) from the kernel */
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while (handle_iscsi_events(nl_fd, false) == 0);
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while (handle_iscsi_events(nl_fd, false) == 0)
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;
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/* Someone else may have already freed the target object by now. */
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target = target_find_by_id(tid);
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@@ -95,7 +95,7 @@ size_t qlt_del_vtarget(u64 port_name)
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unsigned long flags;
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int match = 0;
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pr_info("%s: %llx",__func__, port_name);
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pr_info("%s: %llx", __func__, port_name);
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mutex_lock(&qla_tgt_mutex);
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list_for_each_entry_safe(tgt, t, &qla_tgt_glist, tgt_list_entry) {
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vha = tgt->vha;
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@@ -1619,8 +1619,8 @@ static int sqa_rdy_to_xfer(struct scst_cmd *scst_cmd)
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qla_tgt_set_cmd_prot_op(cmd, false);
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TRACE_DBG("%s: cmd[%p] ulpcmd[%p] dif_actions=0x%x, cdb=0x%x, "
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"prot_sg_cnt[%x], prot_type[%x] prot_op[%x], bufflen[%x]",__func__,
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cmd, cmd->scst_cmd,
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"prot_sg_cnt[%x], prot_type[%x] prot_op[%x], bufflen[%x]",
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__func__, cmd, cmd->scst_cmd,
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scst_cmd->cmd_dif_actions, scst_cmd->cdb_buf[0],
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cmd->prot_sg_cnt, cmd->se_cmd.prot_type, cmd->se_cmd.prot_op,
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cmd->bufflen);
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@@ -1953,7 +1953,7 @@ static int sqa_enable_tgt(struct scst_tgt *scst_tgt, bool enable)
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PRINT_INFO("sqatgt(%ld/%d): %s target pwwn="
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"%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
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vha->host_no, vha->vp_idx, enable ? "Enabling": "Disabling",
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vha->host_no, vha->vp_idx, enable ? "Enabling" : "Disabling",
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vha->port_name[0], vha->port_name[1],
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vha->port_name[2], vha->port_name[3],
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vha->port_name[4], vha->port_name[5],
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@@ -145,9 +145,9 @@ typedef struct {
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#define RD_REG_BYTE_RELAXED(addr) readb_relaxed(addr)
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#define RD_REG_WORD_RELAXED(addr) readw_relaxed(addr)
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#define RD_REG_DWORD_RELAXED(addr) readl_relaxed(addr)
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#define WRT_REG_BYTE(addr, data) writeb(data,addr)
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#define WRT_REG_WORD(addr, data) writew(data,addr)
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#define WRT_REG_DWORD(addr, data) writel(data,addr)
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#define WRT_REG_BYTE(addr, data) writeb(data, addr)
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#define WRT_REG_WORD(addr, data) writew(data, addr)
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#define WRT_REG_DWORD(addr, data) writel(data, addr)
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/*
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* ISP83XX specific remote register addresses
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@@ -235,7 +235,7 @@ typedef struct {
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* 133Mhz slot.
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*/
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#define RD_REG_WORD_PIO(addr) (inw((unsigned long)addr))
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#define WRT_REG_WORD_PIO(addr, data) (outw(data,(unsigned long)addr))
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#define WRT_REG_WORD_PIO(addr, data) (outw(data, (unsigned long)addr))
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/*
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* Fibre Channel device definitions.
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@@ -3926,7 +3926,7 @@ struct qla_hw_data {
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/* NVRAM configuration data */
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#define MAX_NVRAM_SIZE 4096
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#define VPD_OFFSET MAX_NVRAM_SIZE / 2
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#define VPD_OFFSET (MAX_NVRAM_SIZE / 2)
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uint16_t nvram_size;
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uint16_t nvram_base;
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void *nvram;
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@@ -605,7 +605,7 @@ static void qla_nvme_unregister_remote_port(struct work_struct *work)
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return;
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ql_log(ql_log_warn, NULL, 0x2112,
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"%s: unregister remoteport on %p\n",__func__, fcport);
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"%s: unregister remoteport on %p\n", __func__, fcport);
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list_for_each_entry_safe(qla_rport, trport,
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&fcport->vha->nvme_rport_list, list) {
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@@ -1984,7 +1984,7 @@ qla82xx_check_rcvpeg_state(struct qla_hw_data *ha)
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}
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/* ISR related functions */
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static struct qla82xx_legacy_intr_set legacy_intr[] = \
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static struct qla82xx_legacy_intr_set legacy_intr[] =
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QLA82XX_LEGACY_INTR_CONFIG;
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/*
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@@ -3285,7 +3285,7 @@ qla82xx_device_state_handler(scsi_qla_host_t *vha)
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case QLA8XXX_DEV_NEED_QUIESCENT:
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qla82xx_need_qsnt_handler(vha);
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/* Reset timeout value after quiescence handler */
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dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout\
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dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout
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* HZ);
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break;
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case QLA8XXX_DEV_QUIESCENT:
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@@ -3300,7 +3300,7 @@ qla82xx_device_state_handler(scsi_qla_host_t *vha)
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qla82xx_idc_lock(ha);
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/* Reset timeout value after quiescence handler */
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dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout\
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dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout
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* HZ);
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break;
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case QLA8XXX_DEV_FAILED:
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@@ -4231,7 +4231,7 @@ qla82xx_md_collect(scsi_qla_host_t *vha)
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goto md_failed;
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}
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entry_hdr = (qla82xx_md_entry_hdr_t *) \
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entry_hdr = (qla82xx_md_entry_hdr_t *)
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(((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset);
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/* Walk through the entry headers */
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@@ -4338,7 +4338,7 @@ qla82xx_md_collect(scsi_qla_host_t *vha)
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data_collected = (uint8_t *)data_ptr -
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(uint8_t *)ha->md_dump;
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skip_nxt_entry:
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entry_hdr = (qla82xx_md_entry_hdr_t *) \
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entry_hdr = (qla82xx_md_entry_hdr_t *)
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(((uint8_t *)entry_hdr) + entry_hdr->entry_size);
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||||
}
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@@ -488,13 +488,13 @@
|
||||
#define QLA82XX_ADDR_QDR_NET (0x0000000300000000ULL)
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#define QLA82XX_P3_ADDR_QDR_NET_MAX (0x0000000303ffffffULL)
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#define QLA82XX_PCI_CRBSPACE (unsigned long)0x06000000
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#define QLA82XX_PCI_DIRECT_CRB (unsigned long)0x04400000
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#define QLA82XX_PCI_CAMQM (unsigned long)0x04800000
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#define QLA82XX_PCI_CAMQM_MAX (unsigned long)0x04ffffff
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#define QLA82XX_PCI_DDR_NET (unsigned long)0x00000000
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#define QLA82XX_PCI_QDR_NET (unsigned long)0x04000000
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#define QLA82XX_PCI_QDR_NET_MAX (unsigned long)0x043fffff
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#define QLA82XX_PCI_CRBSPACE 0x06000000UL
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#define QLA82XX_PCI_DIRECT_CRB 0x04400000UL
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#define QLA82XX_PCI_CAMQM 0x04800000UL
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#define QLA82XX_PCI_CAMQM_MAX 0x04ffffffUL
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#define QLA82XX_PCI_DDR_NET 0x00000000UL
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#define QLA82XX_PCI_QDR_NET 0x04000000UL
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#define QLA82XX_PCI_QDR_NET_MAX 0x043fffffUL
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/*
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* Register offsets for MN
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@@ -82,12 +82,12 @@ MODULE_PARM_DESC(ql2xplogiabsentdevice,
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"a Fabric scan. This is needed for several broken switches. "
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"Default is 0 - no PLOGI. 1 - perform PLOGI.");
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int ql2xloginretrycount = 0;
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int ql2xloginretrycount;
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module_param(ql2xloginretrycount, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xloginretrycount,
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"Specify an alternate value for the NVRAM login retry count.");
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int ql2xallocfwdump = 0;
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int ql2xallocfwdump;
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module_param(ql2xallocfwdump, int, S_IRUGO);
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MODULE_PARM_DESC(ql2xallocfwdump,
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"Option to enable allocation of memory for a firmware dump "
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+1
-1
@@ -1179,7 +1179,7 @@ do_read:
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count = 0;
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}
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count = actual_size > count ? count: actual_size;
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count = actual_size > count ? count : actual_size;
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memcpy(buf, ha->xgmac_data, count);
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||||
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return count;
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+2
-2
@@ -137,7 +137,7 @@
|
||||
* 133Mhz slot.
|
||||
*/
|
||||
#define RD_REG_WORD_PIO(addr) (inw((unsigned long)addr))
|
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#define WRT_REG_WORD_PIO(addr, data) (outw(data,(unsigned long)addr))
|
||||
#define WRT_REG_WORD_PIO(addr, data) (outw(data, (unsigned long)addr))
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|
||||
/*
|
||||
* Fibre Channel device definitions.
|
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@@ -2729,7 +2729,7 @@ struct qla_hw_data {
|
||||
|
||||
/* NVRAM configuration data */
|
||||
#define MAX_NVRAM_SIZE 4096
|
||||
#define VPD_OFFSET MAX_NVRAM_SIZE / 2
|
||||
#define VPD_OFFSET (MAX_NVRAM_SIZE / 2)
|
||||
uint16_t nvram_size;
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uint16_t nvram_base;
|
||||
void *nvram;
|
||||
|
||||
+2
-2
@@ -4785,7 +4785,7 @@ qla82xx_md_get_template_size(scsi_qla_host_t *vha)
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||||
mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
|
||||
|
||||
mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
|
||||
mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8| \
|
||||
mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
|
||||
MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
|
||||
|
||||
mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
|
||||
@@ -4844,7 +4844,7 @@ qla82xx_md_get_template(scsi_qla_host_t *vha)
|
||||
|
||||
mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
|
||||
mcp->tov = MBX_TOV_SECONDS;
|
||||
mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8| \
|
||||
mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
|
||||
MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
|
||||
mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
|
||||
rval = qla2x00_mailbox_command(vha, mcp);
|
||||
|
||||
+5
-5
@@ -1977,7 +1977,7 @@ qla82xx_check_rcvpeg_state(struct qla_hw_data *ha)
|
||||
}
|
||||
|
||||
/* ISR related functions */
|
||||
static struct qla82xx_legacy_intr_set legacy_intr[] = \
|
||||
static struct qla82xx_legacy_intr_set legacy_intr[] =
|
||||
QLA82XX_LEGACY_INTR_CONFIG;
|
||||
|
||||
/*
|
||||
@@ -3268,7 +3268,7 @@ qla82xx_device_state_handler(scsi_qla_host_t *vha)
|
||||
case QLA82XX_DEV_NEED_QUIESCENT:
|
||||
qla82xx_need_qsnt_handler(vha);
|
||||
/* Reset timeout value after quiescence handler */
|
||||
dev_init_timeout = jiffies + (ha->nx_dev_init_timeout\
|
||||
dev_init_timeout = jiffies + (ha->nx_dev_init_timeout
|
||||
* HZ);
|
||||
break;
|
||||
case QLA82XX_DEV_QUIESCENT:
|
||||
@@ -3283,7 +3283,7 @@ qla82xx_device_state_handler(scsi_qla_host_t *vha)
|
||||
qla82xx_idc_lock(ha);
|
||||
|
||||
/* Reset timeout value after quiescence handler */
|
||||
dev_init_timeout = jiffies + (ha->nx_dev_init_timeout\
|
||||
dev_init_timeout = jiffies + (ha->nx_dev_init_timeout
|
||||
* HZ);
|
||||
break;
|
||||
case QLA82XX_DEV_FAILED:
|
||||
@@ -4168,7 +4168,7 @@ qla82xx_md_collect(scsi_qla_host_t *vha)
|
||||
goto md_failed;
|
||||
}
|
||||
|
||||
entry_hdr = (qla82xx_md_entry_hdr_t *) \
|
||||
entry_hdr = (qla82xx_md_entry_hdr_t *)
|
||||
(((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset);
|
||||
|
||||
/* Walk through the entry headers */
|
||||
@@ -4275,7 +4275,7 @@ qla82xx_md_collect(scsi_qla_host_t *vha)
|
||||
data_collected = (uint8_t *)data_ptr -
|
||||
(uint8_t *)ha->md_dump;
|
||||
skip_nxt_entry:
|
||||
entry_hdr = (qla82xx_md_entry_hdr_t *) \
|
||||
entry_hdr = (qla82xx_md_entry_hdr_t *)
|
||||
(((uint8_t *)entry_hdr) + entry_hdr->entry_size);
|
||||
}
|
||||
|
||||
|
||||
+7
-7
@@ -487,13 +487,13 @@
|
||||
#define QLA82XX_ADDR_QDR_NET (0x0000000300000000ULL)
|
||||
#define QLA82XX_P3_ADDR_QDR_NET_MAX (0x0000000303ffffffULL)
|
||||
|
||||
#define QLA82XX_PCI_CRBSPACE (unsigned long)0x06000000
|
||||
#define QLA82XX_PCI_DIRECT_CRB (unsigned long)0x04400000
|
||||
#define QLA82XX_PCI_CAMQM (unsigned long)0x04800000
|
||||
#define QLA82XX_PCI_CAMQM_MAX (unsigned long)0x04ffffff
|
||||
#define QLA82XX_PCI_DDR_NET (unsigned long)0x00000000
|
||||
#define QLA82XX_PCI_QDR_NET (unsigned long)0x04000000
|
||||
#define QLA82XX_PCI_QDR_NET_MAX (unsigned long)0x043fffff
|
||||
#define QLA82XX_PCI_CRBSPACE 0x06000000UL
|
||||
#define QLA82XX_PCI_DIRECT_CRB 0x04400000UL
|
||||
#define QLA82XX_PCI_CAMQM 0x04800000UL
|
||||
#define QLA82XX_PCI_CAMQM_MAX 0x04ffffffUL
|
||||
#define QLA82XX_PCI_DDR_NET 0x00000000UL
|
||||
#define QLA82XX_PCI_QDR_NET 0x04000000UL
|
||||
#define QLA82XX_PCI_QDR_NET_MAX 0x043fffffUL
|
||||
|
||||
/*
|
||||
*
|
||||
|
||||
+12
-4
@@ -4335,10 +4335,18 @@ static ssize_t scst_sess_latency_show(struct kobject *kobj,
|
||||
char state_name[32];
|
||||
|
||||
switch (attr->attr.name[0]) {
|
||||
case 'n': j = SCST_DATA_NONE & 3; break;
|
||||
case 'r': j = SCST_DATA_READ; break;
|
||||
case 'w': j = SCST_DATA_WRITE; break;
|
||||
case 'b': j = SCST_DATA_BIDI; break;
|
||||
case 'n':
|
||||
j = SCST_DATA_NONE & 3;
|
||||
break;
|
||||
case 'r':
|
||||
j = SCST_DATA_READ;
|
||||
break;
|
||||
case 'w':
|
||||
j = SCST_DATA_WRITE;
|
||||
break;
|
||||
case 'b':
|
||||
j = SCST_DATA_BIDI;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
+3
-2
@@ -845,6 +845,7 @@ void *main_loop(void *arg)
|
||||
multi.multi_cmd.preplies = (uintptr_t)&multi.replies[0];
|
||||
multi.multi_cmd.replies_cnt = 0;
|
||||
multi.multi_cmd.cmds_cnt = MULTI_CMDS_CNT;
|
||||
/* fall through */
|
||||
case EINTR:
|
||||
continue;
|
||||
case EAGAIN:
|
||||
@@ -1561,7 +1562,7 @@ static void exec_read_capacity16(struct vdisk_cmd *vcmd)
|
||||
buffer[4] = (nblocks >> 24) & 0xFF;
|
||||
buffer[5] = (nblocks >> 16) & 0xFF;
|
||||
buffer[6] = (nblocks >> 8) & 0xFF;
|
||||
buffer[7] = nblocks& 0xFF;
|
||||
buffer[7] = nblocks & 0xFF;
|
||||
|
||||
buffer[8] = (blocksize >> (BYTE * 3)) & 0xFF;
|
||||
buffer[9] = (blocksize >> (BYTE * 2)) & 0xFF;
|
||||
@@ -1602,7 +1603,7 @@ static void exec_read_toc(struct vdisk_cmd *vcmd)
|
||||
struct scst_user_scsi_cmd_reply_exec *reply = &vcmd->reply->exec_reply;
|
||||
int32_t off = 0;
|
||||
int length = cmd->bufflen;
|
||||
uint8_t *address = (uint8_t*)(unsigned long)cmd->pbuf;
|
||||
uint8_t *address = (uint8_t *)(unsigned long)cmd->pbuf;
|
||||
uint32_t nblocks;
|
||||
uint8_t buffer[4+8+8] = { 0x00, 0x0a, 0x01, 0x01, 0x00, 0x14,
|
||||
0x01, 0x00, 0x00, 0x00, 0x00, 0x00 };
|
||||
|
||||
+2
-2
@@ -107,13 +107,13 @@ struct vdisk_cmd
|
||||
* strict type-checking.. See the
|
||||
* "unnecessary" pointer comparison.
|
||||
*/
|
||||
#define min(x,y) ({ \
|
||||
#define min(x, y) ({ \
|
||||
typeof(x) _x = (x); \
|
||||
typeof(y) _y = (y); \
|
||||
(void) (&_x == &_y); \
|
||||
_x < _y ? _x : _y; })
|
||||
|
||||
#define max(x,y) ({ \
|
||||
#define max(x, y) ({ \
|
||||
typeof(x) _x = (x); \
|
||||
typeof(y) _y = (y); \
|
||||
(void) (&_x == &_y); \
|
||||
|
||||
+8
-7
@@ -92,17 +92,18 @@ static uint32_t crc_32_tab[] = { /* CRC polynomial 0xedb88320 */
|
||||
0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d
|
||||
};
|
||||
|
||||
#define UPDC32(octet,crc) (crc_32_tab[((crc) ^ ((uint8_t)octet)) & 0xff] ^ ((crc) >> 8))
|
||||
#define UPDC32(octet, crc) \
|
||||
(crc_32_tab[((crc) ^ ((uint8_t)octet)) & 0xff] ^ ((crc) >> 8))
|
||||
|
||||
uint32_t crc32buf(const char *buf, size_t len)
|
||||
{
|
||||
register uint32_t oldcrc32;
|
||||
register uint32_t oldcrc32;
|
||||
|
||||
oldcrc32 = 0xFFFFFFFF;
|
||||
oldcrc32 = 0xFFFFFFFF;
|
||||
|
||||
for ( ; len; --len, ++buf) {
|
||||
oldcrc32 = UPDC32(*buf, oldcrc32);
|
||||
}
|
||||
for ( ; len; --len, ++buf) {
|
||||
oldcrc32 = UPDC32(*buf, oldcrc32);
|
||||
}
|
||||
|
||||
return ~oldcrc32;
|
||||
return ~oldcrc32;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user