mvsas_tgt: Fix sparse warnings

Also, remove unused variables, data structures and functions.


git-svn-id: http://svn.code.sf.net/p/scst/svn/trunk@5215 d57e44dd-8a1f-0410-8b47-8ef2f437770f
This commit is contained in:
Bart Van Assche
2014-01-19 18:47:02 +00:00
parent ee1f37d2a5
commit ed9ed528c8
6 changed files with 71 additions and 355 deletions

View File

@@ -553,11 +553,12 @@ static u8 mvs_64xx_assign_reg_set(struct mvs_info *mvi, u8 *tfs)
return MVS_ID_NOT_MAPPED;
}
void mvs_64xx_make_prd(struct scatterlist *scatter, int nr, void *prd)
static void mvs_64xx_make_prd(struct scatterlist *scatter, int nr, void *prd)
{
int i;
struct scatterlist *sg;
struct mvs_prd *buf_prd = prd;
for_each_sg(scatter, sg, nr, i) {
buf_prd->addr = cpu_to_le64(sg_dma_address(sg));
buf_prd->len = cpu_to_le32(sg_dma_len(sg));
@@ -624,8 +625,8 @@ static void mvs_64xx_phy_work_around(struct mvs_info *mvi, int i)
mvs_write_port_vsr_data(mvi, i, tmp);
}
void mvs_64xx_phy_set_link_rate(struct mvs_info *mvi, u32 phy_id,
struct sas_phy_linkrates *rates)
static void mvs_64xx_phy_set_link_rate(struct mvs_info *mvi, u32 phy_id,
struct sas_phy_linkrates *rates)
{
u32 lrmin = 0, lrmax = 0;
u32 tmp;
@@ -713,26 +714,23 @@ static void mvs_64xx_clear_active_cmds(struct mvs_info *mvi)
}
u32 mvs_64xx_spi_read_data(struct mvs_info *mvi)
static u32 mvs_64xx_spi_read_data(struct mvs_info *mvi)
{
void __iomem *regs = mvi->regs_ex;
return ior32(SPI_DATA_REG_64XX);
}
void mvs_64xx_spi_write_data(struct mvs_info *mvi, u32 data)
static void mvs_64xx_spi_write_data(struct mvs_info *mvi, u32 data)
{
void __iomem *regs = mvi->regs_ex;
iow32(SPI_DATA_REG_64XX, data);
iow32(SPI_DATA_REG_64XX, data);
}
int mvs_64xx_spi_buildcmd(struct mvs_info *mvi,
u32 *dwCmd,
u8 cmd,
u8 read,
u8 length,
u32 addr
)
static int mvs_64xx_spi_buildcmd(struct mvs_info *mvi, u32 *dwCmd, u8 cmd,
u8 read, u8 length, u32 addr)
{
u32 dwTmp;
@@ -750,7 +748,7 @@ int mvs_64xx_spi_buildcmd(struct mvs_info *mvi,
}
int mvs_64xx_spi_issuecmd(struct mvs_info *mvi, u32 cmd)
static int mvs_64xx_spi_issuecmd(struct mvs_info *mvi, u32 cmd)
{
void __iomem *regs = mvi->regs_ex;
int retry;
@@ -765,7 +763,7 @@ int mvs_64xx_spi_issuecmd(struct mvs_info *mvi, u32 cmd)
return 0;
}
int mvs_64xx_spi_waitdataready(struct mvs_info *mvi, u32 timeout)
static int mvs_64xx_spi_waitdataready(struct mvs_info *mvi, u32 timeout)
{
void __iomem *regs = mvi->regs_ex;
u32 i, dwTmp;
@@ -781,7 +779,8 @@ int mvs_64xx_spi_waitdataready(struct mvs_info *mvi, u32 timeout)
}
#ifndef DISABLE_HOTPLUG_DMA_FIX
void mvs_64xx_fix_dma(dma_addr_t buf_dma, int buf_len, int from, void *prd)
static void mvs_64xx_fix_dma(dma_addr_t buf_dma, int buf_len, int from,
void *prd)
{
int i;
struct mvs_prd *buf_prd = prd;

View File

@@ -599,8 +599,8 @@ static void mvs_94xx_phy_work_around(struct mvs_info *mvi, int i)
mvs_write_port_vsr_data(mvi, i, tmp);
}
void mvs_94xx_phy_set_link_rate(struct mvs_info *mvi, u32 phy_id,
struct sas_phy_linkrates *rates)
static void mvs_94xx_phy_set_link_rate(struct mvs_info *mvi, u32 phy_id,
struct sas_phy_linkrates *rates)
{
u32 lrmax = 0;
u32 tmp;
@@ -656,26 +656,23 @@ static void mvs_94xx_clear_active_cmds(struct mvs_info *mvi)
}
u32 mvs_94xx_spi_read_data(struct mvs_info *mvi)
static u32 mvs_94xx_spi_read_data(struct mvs_info *mvi)
{
void __iomem *regs = mvi->regs_ex - 0x10200;
return mr32(SPI_RD_DATA_REG_94XX);
}
void mvs_94xx_spi_write_data(struct mvs_info *mvi, u32 data)
static void mvs_94xx_spi_write_data(struct mvs_info *mvi, u32 data)
{
void __iomem *regs = mvi->regs_ex - 0x10200;
mw32(SPI_RD_DATA_REG_94XX, data);
mw32(SPI_RD_DATA_REG_94XX, data);
}
int mvs_94xx_spi_buildcmd(struct mvs_info *mvi,
u32 *dwCmd,
u8 cmd,
u8 read,
u8 length,
u32 addr
)
static int mvs_94xx_spi_buildcmd(struct mvs_info *mvi, u32 *dwCmd, u8 cmd,
u8 read, u8 length, u32 addr)
{
void __iomem *regs = mvi->regs_ex - 0x10200;
u32 dwTmp;
@@ -694,15 +691,16 @@ int mvs_94xx_spi_buildcmd(struct mvs_info *mvi,
}
int mvs_94xx_spi_issuecmd(struct mvs_info *mvi, u32 cmd)
static int mvs_94xx_spi_issuecmd(struct mvs_info *mvi, u32 cmd)
{
void __iomem *regs = mvi->regs_ex - 0x10200;
mw32(SPI_CTRL_REG_94XX, cmd | SPI_CTRL_SpiStart_94XX);
return 0;
}
int mvs_94xx_spi_waitdataready(struct mvs_info *mvi, u32 timeout)
static int mvs_94xx_spi_waitdataready(struct mvs_info *mvi, u32 timeout)
{
void __iomem *regs = mvi->regs_ex - 0x10200;
u32 i, dwTmp;
@@ -718,7 +716,8 @@ int mvs_94xx_spi_waitdataready(struct mvs_info *mvi, u32 timeout)
}
#ifndef DISABLE_HOTPLUG_DMA_FIX
void mvs_94xx_fix_dma(dma_addr_t buf_dma, int buf_len, int from, void *prd)
static void mvs_94xx_fix_dma(dma_addr_t buf_dma, int buf_len, int from,
void *prd)
{
int i;
struct mvs_prd *buf_prd = prd;

View File

@@ -44,9 +44,9 @@ static const struct mvs_chip_info mvs_chips[] = {
struct mvs_info *tgt_mvi;
struct mvs_tgt_initiator mvs_tgt;
#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26)
struct class_device_attribute *mvst_host_attrs[];
static struct class_device_attribute *mvst_host_attrs[];
#else
struct device_attribute *mvst_host_attrs[];
static struct device_attribute *mvst_host_attrs[];
#endif
#endif
@@ -241,7 +241,7 @@ static int __devinit mvs_alloc(struct mvs_info *mvi, struct Scsi_Host *shost)
unsigned long buf_size;
void *buf;
dma_addr_t buf_dma;
struct mvs_slot_info *slot = 0;
struct mvs_slot_info *slot = NULL;
if (mvi->flags & MVF_FLAG_SOC)
slot_nr = MVS_SOC_SLOTS;
@@ -350,7 +350,7 @@ int mvs_ioremap(struct mvs_info *mvi, int bar, int bar_ex)
mvi->regs_ex = ioremap_nocache(res_start,
res_len);
} else
mvi->regs_ex = (void *)res_start;
mvi->regs_ex = (void __iomem *)res_start;
if (!mvi->regs_ex)
goto err_out;
}
@@ -972,7 +972,7 @@ static DEVICE_ATTR(target_mode,
mvs_show_tgt_enabled,
mvs_store_tgt_enabled);
struct device_attribute *mvst_host_attrs[] = {
static struct device_attribute *mvst_host_attrs[] = {
&dev_attr_target_mode,
NULL,
};
@@ -983,7 +983,6 @@ struct device_attribute *mvst_host_attrs[] = {
/* task handler */
struct task_struct *mvs_th;
static int __init mvs_init(void)
{
int rc;

View File

@@ -206,7 +206,7 @@ void mvs_get_sas_addr(void *buf, u32 buflen)
/*memcpy(buf, "\x50\x05\x04\x30\x11\xab\x64\x40", 8);*/
}
struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
static struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
{
unsigned long i = 0, j = 0, hi = 0;
struct sas_ha_struct *sha = dev->port->ha;
@@ -235,7 +235,7 @@ struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
}
/* FIXME */
int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)
static int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)
{
unsigned long i = 0, j = 0, n = 0, num = 0;
struct mvs_device *mvi_dev = dev->lldd_dev;
@@ -1337,7 +1337,7 @@ void mvs_port_deformed(struct asd_sas_phy *sas_phy)
mvs_port_notify_deformed(sas_phy, 1);
}
struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
static struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
{
u32 dev;
for (dev = 0; dev < MVS_MAX_DEVICES; dev++) {
@@ -1354,7 +1354,7 @@ struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
return NULL;
}
void mvs_free_dev(struct mvs_device *mvi_dev)
static void mvs_free_dev(struct mvs_device *mvi_dev)
{
u32 id = mvi_dev->device_id;
memset(mvi_dev, 0, sizeof(*mvi_dev));
@@ -1364,7 +1364,7 @@ void mvs_free_dev(struct mvs_device *mvi_dev)
mvi_dev->taskfileset = MVS_ID_NOT_MAPPED;
}
int mvs_dev_found_notify(struct domain_device *dev, int lock)
static int mvs_dev_found_notify(struct domain_device *dev, int lock)
{
unsigned long flags = 0;
int res = 0;
@@ -1418,7 +1418,7 @@ int mvs_dev_found(struct domain_device *dev)
return mvs_dev_found_notify(dev, 1);
}
void mvs_dev_gone_notify(struct domain_device *dev)
static void mvs_dev_gone_notify(struct domain_device *dev)
{
unsigned long flags = 0;
struct mvs_device *mvi_dev = dev->lldd_dev;
@@ -1861,6 +1861,8 @@ static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task,
int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags)
__releases(&mvi->lock)
__acquires(&mvi->lock)
{
u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];

View File

@@ -35,74 +35,31 @@ u8 DEFAULT_SPI_CMD[16] =
0x06, 0x04, 0x05, 0x01, 0x03, 0x02, 0x52, 0x62, 0x15
};
#else
u8 ATMEL_SPI_CMD[16] =
static u8 ATMEL_SPI_CMD[16] =
{
0x06, 0x04, 0x05, 0x01, 0x03, 0x02, 0x52, 0x62, 0x15
};
u8 MXIC_SPI_CMD[16] =
{
0x06, 0x04, 0x05, 0x01, 0x03, 0x02, 0x20, 0x60, 0x90
};
u8 WINBOND_SPI_CMD[16] =
static u8 WINBOND_SPI_CMD[16] =
{
0x06, 0x04, 0x05, 0x01, 0x03, 0x02, 0x20, 0xC7, 0xAB
};
u8 ATMEL_SPI_CMD_41a_021[16] =
static u8 ATMEL_SPI_CMD_41a_021[16] =
{
/* 0 1 2 3 4 5 6 7 8 9 10 11*/
0x06, 0x04, 0x05, 0x01, 0x03, 0x02, 0xD8, 0x60, 0x9F, 0x36, 0x39, 0x3C
};
u8 EON_F20_SPI_CMD[16] =
static u8 EON_F20_SPI_CMD[16] =
{
0x06, 0x04, 0x05, 0x01, 0x03, 0x02, 0x20, 0x60, 0x90
};
#endif
int spi_rdsr(struct mvs_info *mvi, u8 *sr)
{
u32 dwTmp;
MVS_CHIP_DISP->spi_buildcmd(mvi, &dwTmp,
(u8)SPICmd[SPI_INS_RDSR],
1,
1,
-1);
MVS_CHIP_DISP->spi_issuecmd(mvi, dwTmp);
if (0 == MVS_CHIP_DISP->spi_waitdataready(mvi, 10000)) {
dwTmp = MVS_CHIP_DISP->spi_read_data(mvi);
*sr = (u8)dwTmp;
return 0;
} else {
mv_dprintk("timeout\n");
}
return -1;
}
int spi_pollisr(struct mvs_info *mvi, u8 mask, u8 bit, u32 timeout)
{
u32 i;
u8 sr;
for (i = 0; i < timeout; i++) {
if (0 == spi_rdsr(mvi, &sr)) {
if ((sr & mask) == bit)
return 0;
}
msleep(20);
}
return -1;
}
#ifdef IDENTIFY_SPI
#define SPI_IDENTIFY_TIMER 10000
int spi_atmelidentify(struct mvs_info *mvi)
static int spi_atmelidentify(struct mvs_info *mvi)
{
u32 dwtmp;
MVS_CHIP_DISP->spi_buildcmd(mvi, &dwtmp,
@@ -125,7 +82,7 @@ int spi_atmelidentify(struct mvs_info *mvi)
return -1;
}
int spi_atmelidentify_41a_021(struct mvs_info *mvi)
static int spi_atmelidentify_41a_021(struct mvs_info *mvi)
{
u32 dwTmp;
MVS_CHIP_DISP->spi_buildcmd(mvi, &dwTmp,
@@ -155,7 +112,7 @@ int spi_atmelidentify_41a_021(struct mvs_info *mvi)
}
int spi_winbondidentify(struct mvs_info *mvi)
static int spi_winbondidentify(struct mvs_info *mvi)
{
u32 dwTmp;
@@ -180,31 +137,7 @@ int spi_winbondidentify(struct mvs_info *mvi)
return -1;
}
int spi_mxicidentify(struct mvs_info *mvi)
{
u32 dwTmp;
MVS_CHIP_DISP->spi_buildcmd(mvi, &dwTmp,
MXIC_SPI_CMD[SPI_INS_RDID],
1,
2,
0);
MVS_CHIP_DISP->spi_issuecmd(mvi, dwTmp);
if (0 == MVS_CHIP_DISP->spi_waitdataready(mvi, SPI_IDENTIFY_TIMER)) {
dwTmp = MVS_CHIP_DISP->spi_read_data(mvi);
switch (dwTmp) {
case 0x11C2:
mvi->flashid = MX25L2005;
mvi->flashsize = 256L * 1024;
mvi->flashsectSize = 4L * 1024;
return 0;
}
}
return -1;
}
int spi_eonidentify_f20(struct mvs_info *mvi)
static int spi_eonidentify_f20(struct mvs_info *mvi)
{
u32 dwTmp;
@@ -232,7 +165,7 @@ int spi_eonidentify_f20(struct mvs_info *mvi)
#endif
int spi_init(struct mvs_info *mvi)
static int spi_init(struct mvs_info *mvi)
{
u32 i;
#ifndef IDENTIFY_SPI
@@ -270,7 +203,7 @@ int spi_init(struct mvs_info *mvi)
#endif
}
int spi_read(struct mvs_info *mvi, u32 addr, u8 *data, u8 size)
static int spi_read(struct mvs_info *mvi, u32 addr, u8 *data, u8 size)
{
u32 i, dwTmp;
@@ -294,7 +227,7 @@ int spi_read(struct mvs_info *mvi, u32 addr, u8 *data, u8 size)
return -1;
}
int spi_readbuf(struct mvs_info *mvi, u32 addr, u8 *data, u32 count)
static int spi_readbuf(struct mvs_info *mvi, u32 addr, u8 *data, u32 count)
{
u32 i, j;
u32 tmpAddr, tmpdata, addrend;
@@ -325,7 +258,7 @@ int spi_readbuf(struct mvs_info *mvi, u32 addr, u8 *data, u32 count)
return 0;
}
u8 mvverifychecksum(u8 *address, u32 Size)
static u8 mvverifychecksum(u8 *address, u32 Size)
{
u8 checkSum = 0;
u32 temp = 0;
@@ -336,149 +269,8 @@ u8 mvverifychecksum(u8 *address, u32 Size)
return checkSum;
}
u8 mvcalculatechecksum(u8 *address, u32 size)
{
u8 checkSum;
u32 temp = 0;
checkSum = 0;
for (temp = 0; temp < size; temp++)
checkSum += address[temp];
checkSum = (~checkSum) + 1;
return checkSum;
}
int spi_wren(struct mvs_info *mvi)
{
u32 dwTmp;
MVS_CHIP_DISP->spi_buildcmd(mvi, &dwTmp,
(u8)SPICmd[SPI_INS_WREN],
0,
0,
-1);
MVS_CHIP_DISP->spi_issuecmd(mvi, dwTmp);
if (0 != MVS_CHIP_DISP->spi_waitdataready(mvi, 10000))
return -1;
if (0 == spi_pollisr(mvi, 0x03, 0x02, 300000))
return 0;
return -1;
}
int spi_rdpt(struct mvs_info *mvi, u32 addr, u8 *data)
{
u32 dwTmp;
MVS_CHIP_DISP->spi_buildcmd(mvi, &dwTmp,
(u8)SPICmd[SPI_INS_RDPT],
1,
1,
addr);
MVS_CHIP_DISP->spi_issuecmd(mvi, dwTmp);
if (0 == MVS_CHIP_DISP->spi_waitdataready(mvi, 10000)) {
dwTmp = MVS_CHIP_DISP->spi_read_data(mvi);
*data = (u8)dwTmp;
return 0;
} else {
mv_dprintk("SPI_RDPT timeout\n");
}
return -1;
}
int spi_sectunprotect(struct mvs_info *mvi, u32 addr)
{
u32 dwTmp;
u8 protect_sect = 0xFF;
if (-1 == spi_rdpt(mvi, addr, &protect_sect))
return -1;
if (protect_sect == 0)
return 0;
if (-1 == spi_wren(mvi))
return -1;
MVS_CHIP_DISP->spi_buildcmd(mvi, &dwTmp,
(u8)SPICmd[SPI_INS_UPTSEC],
0,
0,
addr);
MVS_CHIP_DISP->spi_issuecmd(mvi, dwTmp);
if (0 != MVS_CHIP_DISP->spi_waitdataready(mvi, 10000))
return -1;
if (0 == spi_pollisr(mvi, 0x03, 0, 300000))
return 0;
mv_dprintk("error SPI_SectUnprotect \n");
return -1;
}
int spi_secterase(struct mvs_info *mvi, u32 addr)
{
u32 dwTmp;
if (-1 == spi_wren(mvi))
return -1;
if ((mvi->flashid == AT25DF041A) || (mvi->flashid == AT25DF021)) {
if (-1 == spi_sectunprotect(mvi, addr)) {
mv_dprintk("Un protect error.\n");
return -1;
}
}
MVS_CHIP_DISP->spi_buildcmd(mvi, &dwTmp,
(u8)SPICmd[SPI_INS_SERASE],
0,
0,
addr);
MVS_CHIP_DISP->spi_issuecmd(mvi, dwTmp);
if (0 != MVS_CHIP_DISP->spi_waitdataready(mvi, 10000))
return -1;
if (0 == spi_pollisr(mvi, 0x03, 0, 300000))
return 0;
mv_dprintk("error SPI_SectErase\n");
return -1;
}
int spi_write(struct mvs_info *mvi, u32 addr, u32 data)
{
u32 dwTmp;
spi_wren(mvi);
MVS_CHIP_DISP->spi_write_data(mvi, data);
MVS_CHIP_DISP->spi_buildcmd(mvi, &dwTmp,
(u8)SPICmd[SPI_INS_RPOG],
0,
4,
addr);
MVS_CHIP_DISP->spi_issuecmd(mvi, dwTmp);
if (0 != MVS_CHIP_DISP->spi_waitdataready(mvi, 10000)) {
mv_dprintk("timeout\n");
return -1;
}
if (0 == spi_pollisr(mvi, 0x01, 0, 5000))
return 0;
mv_dprintk("timeout\n");
return -1;
}
int spi_writebuf(struct mvs_info *mvi, u32 addr, u32 *data, u32 count)
{
u32 i;
for (i = 0; i < count; i += 4) {
if (-1 == spi_write(mvi, addr + i, *(u32 *)&data[i])) {
mv_dprintk("Write failed at %5.5x\n", addr+i);
return -1;
}
}
return 0;
}
bool mvui_init_param(struct mvs_info *mvi, struct hba_info_main *hba_info_para)
static bool mvui_init_param(struct mvs_info *mvi,
struct hba_info_main *hba_info_para)
{
u32 param_flash_addr = PARA_OFF;
if (!mvi)

View File

@@ -68,10 +68,9 @@ static int mvst_start_sas_target(struct mvs_info *mvi, u8 id);
static int mvst_restart_free_list(struct mvs_info *mvi, u8 slot_id);
static uint16_t mvst_get_scsi_transport_version(struct scst_tgt *scst_tgt);
struct kmem_cache *mvst_cmd_cachep;
struct mvst_msg_queue tgt_msg_queue;
static struct kmem_cache *mvst_cmd_cachep;
struct scst_tgt_template tgt_template = {
static struct scst_tgt_template tgt_template = {
.name = MVST_NAME,
.sg_tablesize = 0,
.use_clustering = 1,
@@ -134,30 +133,6 @@ mvst_prep_prd(struct mvst_prm *prm, struct mvs_prd *buf_prd)
}
void
mvst_fixup_payload(u32 *payload, u32 nr_pl_dwords)
{
u32 tmp;
while (nr_pl_dwords--) {
tmp = *payload;
tmp = ((tmp & 0x000000FF) << 24) |
((tmp & 0x0000FF00) << 8) |
((tmp & 0x00FF0000) >> 8) |
((tmp & 0xFF000000) >> 24);
*payload = tmp;
payload++;
}
}
void
memory_dword_copy(u32 *dst, u32 *src, u32 nr_bytes)
{
nr_bytes /= sizeof(u32);
while (nr_bytes--)
*dst++ = *src++;
}
static inline int test_tgt_sess_count(struct mvst_tgt *tgt,
struct mvs_info *mvi)
{
@@ -523,7 +498,7 @@ static int mvst_prep_resp_frame(struct mvst_prm *prm,
static int
mvst_send_resp(struct mvs_info *mvi, struct mvst_cmd *cmd)
{
struct mvst_prm prm = { 0 };
struct mvst_prm prm = { NULL };
struct scst_cmd *scst_cmd = cmd->scst_cmd;
u16 pass = 0;
struct mvs_slot_info *slot;
@@ -760,7 +735,7 @@ static int mvst_xmit_response(struct scst_cmd *scst_cmd)
struct mvst_sess *sess;
int is_send_status;
unsigned long flags = 0;
struct mvst_prm prm = { 0 };
struct mvst_prm prm = { NULL };
struct mvs_info *mvi;
TRACE_ENTRY();
@@ -1038,7 +1013,7 @@ static int mvst_rdy_to_xfer(struct scst_cmd *scst_cmd)
int res = SCST_TGT_RES_SUCCESS;
struct mvst_sess *sess;
unsigned long flags = 0;
struct mvst_prm prm = { 0 };
struct mvst_prm prm = { NULL };
struct mvs_slot_info *slot;
u32 rc = 0, pass = 0;
struct mvs_info *mvi;
@@ -1432,8 +1407,9 @@ out:
}
struct mvst_port *mvst_get_port_by_sasaddr(struct mvs_info *mvi,
u64 dst_sas_addr, u64 src_sas_addr)
static struct mvst_port *mvst_get_port_by_sasaddr(struct mvs_info *mvi,
u64 dst_sas_addr,
u64 src_sas_addr)
{
int n = 0;
for (n = 0; n < mvi->chip->n_phy; n++) {
@@ -1470,10 +1446,8 @@ struct mvst_port *mvst_get_port_by_sasaddr(struct mvs_info *mvi,
return &mvi->tgt_port[n];
}
int mvst_build_cmd(struct mvs_info *mvi,
struct mvs_slot_info *slot,
struct mvst_cmd **pcmd,
int cmd_type)
static int mvst_build_cmd(struct mvs_info *mvi, struct mvs_slot_info *slot,
struct mvst_cmd **pcmd, int cmd_type)
{
int res = 0;
u64 src_sas_addr, dst_sas_addr;
@@ -1552,8 +1526,8 @@ out:
/* mvi->lock supposed to be held on entry */
int mvst_send_cmd_to_scst(struct mvs_info *mvi,
struct mvs_slot_info *slot)
static int mvst_send_cmd_to_scst(struct mvs_info *mvi,
struct mvs_slot_info *slot)
{
int res = 0;
u64 initiator_sas_addr;
@@ -1868,7 +1842,7 @@ static inline int mvst_send_notify_ack(struct mvst_cmd *cmd, int status)
int res = 0;
u8 buf[4] = {0, 0, 0, 0};
struct mvs_slot_info *resp_slot;
struct mvst_prm prm = { 0 };
struct mvst_prm prm = { NULL };
struct mvs_info *mvi = cmd->sess->tgt->mvi;
TRACE_ENTRY();
@@ -1935,7 +1909,7 @@ static int mvst_send_busy(struct mvs_info *mvi, struct mvs_slot_info *slot)
int res = 0;
struct mvs_slot_info *resp_slot;
struct mvst_cmd *cmd = NULL;
struct mvst_prm prm = { 0 };
struct mvst_prm prm = { NULL };
TRACE_ENTRY();
@@ -2088,18 +2062,6 @@ out:
return rc;
}
void mvs_enable_taget_xmt(struct mvs_info *mvi, int PhyId)
{
void __iomem *regs = mvi->regs;
u32 tmp;
tmp = mr32(MVS_PCS);
#ifdef SUPPORT_TARGET
tmp |= PCS_RSP_RX_EN;
#endif
mw32(MVS_PCS, tmp);
}
static void mvst_register_tgt_handler(struct mvs_info *mvi)
{
struct mvst_tgt *tgt = NULL;
@@ -2710,7 +2672,7 @@ out:
return res;
}
void mvs_tgt_unregister_driver(void)
static void mvs_tgt_unregister_driver(void)
{
ENTER(__func__);
memset(&mvs_tgt, 0, sizeof(mvs_tgt));
@@ -2718,43 +2680,6 @@ void mvs_tgt_unregister_driver(void)
return;
}
void mvst_msg_insert(struct mvst_msg_queue *msg_queue,
void *data, unsigned int event, u64 param)
{
struct mvst_msg *msg;
unsigned long flags;
mv_dprintk("msg insert %d.\n", event);
spin_lock_irqsave(&msg_queue->msg_lock, flags);
if (list_empty(&msg_queue->free)) {
/* should wreck some havoc ...*/
PRINT_ERROR("%s :Message queue is full.", __func__);
spin_unlock_irqrestore(&msg_queue->msg_lock, flags);
return;
}
msg = list_entry(msg_queue->free.next, struct mvst_msg, msg_entry);
msg->data = data;
msg->msg = event;
switch (event) {
case EVENT_DEVICE_REMOVAL:
case EVENT_DEVICE_ARRIVAL:
msg->param = param;
break;
default:
msg->param = param;
break;
}
list_move_tail(&msg->msg_entry, &msg_queue->tasks);
spin_unlock_irqrestore(&msg_queue->msg_lock, flags);
if (msg_queue->msg_task)
wake_up_process(msg_queue->msg_task);
}
void mvst_init_tgt_port(struct mvs_info *mvi)
{
INIT_LIST_HEAD(&mvi->data_cmd_list);